Quectel UC20 Manual

Manual is about: UMTS/HSPA Module Series

Summary of UC20

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    Uc20 hardware design umts/hspa module series rev. Uc20_hardware_design_v1.2 date: 2014-01-13 www.Quectel.Com.

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 1 / 84 our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: quectel wireless solutions co., ltd. Office 501, building 13, no.99, ti...

  • Page 3: About The Document

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 2 / 84 about the document history revision date author description 1.0 2013-07-17 mountain zhou initial 1.1 2013-08-29 mountain zhou 1. Updated usb driver information. 2. Added gnss contents in chapter 4. 3. Ad...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 3 / 84 contents about the document ................................................................................................................................... 2 contents ...................................

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 4 / 84 3.10. Uart interface ........................................................................................................................ 38 3.11. Usim card interface ...................................

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 5 / 84 8.2. Manufacturing and welding ..................................................................................................... 74 8.3. Packaging .......................................................

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 6 / 84 table index table 1: uc20 series frequency bands ............................................................................................... 11 table 2: uc20 key features ...............................

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 7 / 84 figure index figure 1: functional diagram ........................................................................................................ 16 figure 2: pin assignment (top view).....................

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 8 / 84 figure 42: bottom pads dimensions (bottom view) ............................................................... 71 figure 43: recommended footprint (top view) ...............................................

  • Page 10: Introduction

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 9 / 84 1 introduction this document defines the uc20 module and describes its hardware interface which are connected with your application and the air interface. This document can help you quickly understand mo...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 10 / 84 1.1. Safety information the following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating uc20 modul...

  • Page 12: Product Concept

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 11 / 84 2 product concept 2.1. General description uc20 is an embedded hspa+ engine with rx-diversity. Its umts-based modem provides data connectivity on hspa+, hsdpa, hsupa, wcdma, networks. It can also provid...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 12 / 84 2.2.1. Fcc statement 1. This device complies with part 15 of the fcc rules. Operation is subject to the following conditions: a) this device may not cause harmful interference. B) this device must accep...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 13 / 84 table 2: uc20 key features feature details power supply supply voltage: 3.4v~4.3v typical supply voltage: 3.8v frequency bands uc20-a: umts850/1900 transmission data hspa r6: max 14.4mbps (dl)/max 5.76m...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 14 / 84 “ 1) ” means when the module works within this temperature range, rf performance might degrade. For example, the frequency error or the phase error would increase. Main uart interface: seven lines on ma...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 15 / 84 2.4. Functional diagram the following figure shows a block diagram of uc20 and illustrates the major functional parts. Power management baseband ddr+nand flash radio frequency peripheral interface --uar...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 16 / 84 pwrkey reset_n 32khz 19.2mhz power management unit baseband rf transceiver gnss receiver ant_gnss rf switch ddr ram/ ant_main usim status adc pcm uart vbat_bb usb ant_div vbat_rf vdd_ext gsm umts rf swi...

  • Page 18: Application Interface

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 17 / 84 3 application interface 3.1. General description uc20 is equipped with a 72-pin 1.3mm pitch smt pads plus 40-pin ground pads and reserved pads that connect to cellular application platform. Sub-interfac...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 18 / 84 3.2. Pin assignment the following figure shows the pin assignment of the uc20 module. 35 36 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 1 3 4 5 6 7 2 wakeup_in ap_ready sleep_ind w_disable# net_mode ne...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 19 / 84 3.3. Pin description the following tables show the uc20’s pin definition. Table 3: io parameters definition type description io bidirectional input/output di digital input do digital output pi power inp...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 20 / 84 vdd_ext 7 po provide 1.8v for external circuit. Vnorm = 1.8v i o max = 20ma power supply for external gpio’s pull up circuits. Vdd_2v85 34 po provide 2.85v for external circuit. Vnorm = 2.85v i o max = ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 21 / 84 usb_vbus 71 pi usb detection. Vmax = 5.25v vmin = 3.0v vnorm = 5.0v usb_dp 69 io usb differential data bus. Compliant with usb 2.0 standard specification. Require differential impedance of 90Ω. Usb_dm 7...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 22 / 84 usim_rst 17 do reset signal of usim card. For 1.8v usim: v ol max = 0.22v v oh min = 1.44v for 3.0v usim: v ol max = 0.36v v oh min = 2.4v usim_pre sence 13 di usim card insertion detection. V il min = ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 23 / 84 rxd 68 di receive data. V il min = -0.3v v il max = 0.6v v ih min = 1.2v v ih max = 2.0v 1.8v power domain. Debug uart interface pin name pin no. I/o description dc characteristics comment dbg_txd 12 do...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 24 / 84 agnd 22 reserved for analog ground. Ground. If unused, connect this pin to ground. I2c interface pin name pin no. I/o description dc characteristics comment i2c_scl 41 od i2c serial clock. External pull...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 25 / 84 3.4. Operating modes the table below briefly summarizes the various operating modes referred to in the following chapters. Table 5: overview of operating modes mode details normal operation umts idle so...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 26 / 84 3.5.1.1. Uart application if application processor communicates with module via uart interface, the following preconditions can let the module enter into the sleep mode. Execute at command at+qsclk=1 to...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 27 / 84 usb_vbus usb_dp usb_dm ap_ready vdd usb_dp usb_dm gpio module processor gnd gnd ri eint figure 4: usb application with suspend function when the processor’s usb bus returns to resume state, the module w...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 28 / 84 usb_vbus usb_dp usb_dm ap_ready vdd usb_dp usb_dm gpio module processor ri eint power switch gpio gnd gnd figure 5: usb sleep application without suspend function supply power to usb_vbus will wake up t...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 29 / 84 module up first. 3. Gnss function is still available when rf function is disabled. 3.6. Power supply 3.6.1. Power supply pins uc20 provides four vbat pins dedicated to connect with the external power su...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 30 / 84 module vbat_rf vbat_bb vbat c1 100uf c6 100nf c7 33pf c8 10pf + + c2 100nf c5 100uf c3 33pf c4 10pf fb1 fb2 d1 5.1v figure 6: star structure of the power supply please pay special attention to the power...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 31 / 84 3.6.4. Monitor the power supply you can use the at+cbc command to monitor the vbat_bb voltage value. For more details, please refer to document [1]. 3.7. Turn on and off scenarios 3.7.1. Turn on module ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 32 / 84 pwrkey s1 close to s1 tvs figure 9: turn on the module using keystroke the turn on scenarios is illustrated as the following figure..

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 33 / 84 v il ≤ 0.5v v ih ≥ 1.3v vbat pwrkey ≥ 100ms 1 reset_n status (od) 1.3 ~ 1.9s inactive uart active ≥ 5s inactive active usb ≥ 5s figure 10: timing of turning on module make sure that vbat is stable befor...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 34 / 84 vbat pwrkey log off network about 1s to 60s ≥ 0.6s running power-down procedure off module status status (od) figure 11: timing of turning off module during power-down procedure, module will send out ur...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 35 / 84 the uncritical voltage is 3.4v to 4.3v, if the voltage > 4.3v or down itself. If the voltage +qind: “vbatt”,-2 if the voltage > 4.3v, the following urc will be presented: +qind: “vbatt”,2 the value of v...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 36 / 84 reset pulse reset_n 4.7k 47k ≥ 150ms figure 12: reference circuit of reset_n by using driving circuit reset_n s2 close to s2 tvs figure 13: reference circuit of reset_n by using button the reset scenari...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 37 / 84 use the reset_n only when turning off the module by the command at+qpowd and the pwrkey pin failed. 3.9. Rtc backup the rtc (real time clock) can be powered by an external power source through the pin v...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 38 / 84 large capacitance capacitor module rtc core r vrtc figure 17: rtc supply from capacitor 3.10. Uart interface the module provides two uart interfaces: main uart interface and debug uart interface. The fo...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 39 / 84 dtr 66 di data terminal ready. 1.8v power domain. Txd 67 do transmit data. 1.8v power domain. Rxd 68 di receive data. 1.8v power domain. Table 10: pin definition of the debug uart interface pin name pin...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 40 / 84 vcca vccb oe a1 a2 a3 a4 a5 a6 a7 a8 gnd b1 b2 b3 b4 b5 b6 b7 b8 vdd_ext ri dcd rts rxd dtr cts txd 51k 51k 0.1uf 0.1uf ri_3.3v dcd_3.3v rts_3.3v rxd_3.3v dtr_3.3v cts_3.3v txd_3.3v vdd_3.3v txb0108pwr ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 41 / 84 txb0108pwr dcd_3.3v rts_3.3v dtr_3.3v rxd_3.3v ri_3.3v cts_3.3v txd_3.3v dcd rts dtr rxd ri cts txd dcd_1.8v rts_1.8v dtr_1.8v rxd_1.8v ri_1.8v cts_1.8v txd_1.8v vcca module gnd gnd vdd_ext vccb 3.3v di...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 42 / 84 3.11. Usim card interface 3.11.1. Usim card application the usim card interface circuitry meets etsi and imt-2000 sim interface requirements. Both 1.8v and 3.0v usim cards are supported. Table 12: pin d...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 43 / 84 some at commands are invalid when usim card is not applied. Uc20 supports usim card hot-plugging via the usim_presence pin. For details, refer to document [1] about the command at+qsimdet. If you do not...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 44 / 84 3.11.2. Design considerations for usim connector for 8-pin usim connector, it is recommended to use molex 91228. Please visit http://www.Molex.Com for more information. Figure 24: molex 91228 usim conne...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 45 / 84 for 6-pin usim connector, it is recommended to use amphenol c707 10m006 512 2. Please visit http://www.Amphenol.Com for more information. Figure 25: amphenol c707 10m006 512 2 usim card connector table ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 46 / 84 3.12. Usb interface uc20 contains one integrated universal serial bus (usb) transceiver which complies with the usb 2.0 specification and supports high speed (480 mbps), full speed (12 mbps) and low spe...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 47 / 84 in order to ensure the usb interface design corresponding with the usb 2.0 specification, please comply with the following principles. It is important to route the usb signal traces as differential pair...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 48 / 84 in primary mode, the data is sampled on the falling edge of the pcm_clk and transmitted on the rising edge; the pcm_sync falling edge represents the msb. In this mode, pcm_clk supports 128, 256, 512, 10...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 49 / 84 pcm_clk pcm_sync pcm_out msb lsb pcm_in 125us msb 1 2 16 15 lsb figure 29: auxiliary mode timing the following table shows the pin definition of pcm and i2c interface which can be applied on audio codec...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 50 / 84 the following figure shows the reference design of pcm interface with external codec ic. Pcm_in pcm_out pcm_sync pcm_clk i2c_scl i2c_sda nau8814 module 1.8v 4 .7 k 4 .7 k bclk mclk fs dacin adcout sclk ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 51 / 84 the following table describes the characteristic of the adc function. Table 18: characteristic of the adc parameter min. Typ. Max. Unit adc0 voltage range 0.2 2.1 v adc1 voltage range 0.2 4.2 v adc reso...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 52 / 84 a reference circuit is shown in the following figure. 4.7k 47k vbat 2.2k module network indicator figure 31: reference circuit of the network indicator 3.16. Operating status indication 3.16.1. Status t...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 53 / 84 vdd_mcu 10k module status mcu_gpio module status vbat 2.2k figure 32: reference circuit of the status 3.16.2. Sleep_ind the sleep_ind is an indicated pin for judging whether the module is in sleep mode ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 54 / 84 a reference circuit is shown in the following figure. 4.7k 47k vbat 2.2k module sleep_ind figure 33: reference circuit of the sleep_ind 3.17. Behavior of the ri you can use command at+qcfg=“risignaltype...

  • Page 56: Gnss Receiver

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 55 / 84 4 gnss receiver 4.1. General description uc20 includes a fully integrated global navigation satellite system solution that supports the latest generation gpsone gen8 of qualcomm (gps and glonass). Compa...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 56 / 84 4.2. Gnss performance the following table shows uc20 gnss performance. Table 24: gnss performance parameter description conditions typ. Unit sensitivity (gnss) cold start autonomous -144 dbm with lna -1...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 57 / 84 4.3. Layout guideline the following layout guideline should be taken into account in your design. Maximize the distance between the gnss antenna and the main umts antenna. Noisy digital circuits such as...

  • Page 59: Antenna Interface

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 58 / 84 5 antenna interface uc20 antenna interface includes a main umts antenna, an optional umts rx-diversity antenna, which is used to improve umts’s receiving performance, and a gnss antenna. The antenna int...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 59 / 84 ant_main r1 0r c1 module main antenna nm c2 nm r2 0r c3 diversity antenna nm c4 nm ant_div figure 34: reference circuit of antenna interface keep a proper distance between main antenna and diversity ant...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 60 / 84 active antenna. Table 28: gnss frequency type frequency unit gps 1575.42±1.023 mhz glonass 1597.5~1605.8 mhz 5.2.1. Reference design for passive antenna passive antenna max2659 module ant_gnss /shdn gnd...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 61 / 84 5.2.2. Reference design for active antenna active antenna vdd module ant_gnss 47nh 10r 0.1uf 100pf nm nm figure 36: reference circuit of gnss active antenna 1. You can choose the corresponding reference...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 62 / 84 table 29: antenna requirements type requirements gnss frequency range: 1565~1607 mhz polarization: rhcp or linear vswr: passive antenna gain: > 0dbi active antenna noise figure: active antenna gain: > -...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 63 / 84 figure 38: mechanicals of uf.L-lp connectors the following figure describes the space factor of mated connector figure 39: space factor of mated connector (unit: mm) for more details, please visit http:...

  • Page 65: Electrical,

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 64 / 84 6 electrical, reliability and radio characteristics 6.1. Absolute maximum ratings absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following t...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 65 / 84 6.2. Power supply ratings table 31: the module power supply ratings parameter description conditions min. Typ. Max. Unit vbat vbat_bb and vbat_rf voltage must stay within the min/max values, including v...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 66 / 84 table 33: the module current consumption parameter description conditions min. Typ. Max. Unit i vbat off state supply current power down 45 ua wcdma supply current (gnss off) sleep (usb disconnected) @ ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 67 / 84 gnss tracking current is tested in the following conditions: for cold start, 10 minutes after first fix. For hot start, 15 seconds after first fix. 6.5. Rf output power the following table shows the rf ...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 68 / 84 table 36: electrostatics discharge characteristics tested points contact discharge air discharge unit vbat, gnd ±5 ±10 kv all antenna interfaces ±4 ±8 kv other interfaces ±0.5 ±1 kv.

  • Page 70: Mechanical Dimensions

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 69 / 84 7 mechanical dimensions this chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 7.1. Mechanical dimensions of the module (32+/-0.15) (29+ /-0. 15) figure 40: u...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 70 / 84 3.4 3.2 3.4 3.2 3.4 3.2 4.8 32 29 0.5 1.5 figure 41: uc20 bottom dimensions (bottom view) “ xxxx ” in pink on above figure is the pcb board code in the exposed copper. Note.

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 71 / 84 figure 42: bottom pads dimensions (bottom view).

  • Page 73

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 72 / 84 7.2. Footprint of recommendation 32 1.9 7.8 13 1.9 9.04 9.3 6.45 3.45 4.4 22.1 6.16 29 0.8 1.3 4.8 2 3 4.6 2.5 1.0 3.4 6.8 figure 43: recommended footprint (top view) 1. Keep out the area below the test...

  • Page 74

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 73 / 84 7.3. Top view of the module figure 44: top view of the module 7.4. Bottom view of the module figure 45: bottom view of the module.

  • Page 75: Storage And Manufacturing

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 74 / 84 8 storage and manufacturing 8.1. Storage uc20 is stored in the vacuum-sealed bag. The restriction of storage condition is shown as below. Shelf life in sealed bag is 12 months at after this bag is opene...

  • Page 76

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 75 / 84 it is suggested that peak reflow temperature is 235 ~ 245ºc (for snag3.0cu0.5 alloy). Absolute max reflow temperature is 260ºc. To avoid damage to the module when it was repeatedly heated, it is suggest...

  • Page 77

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 76 / 84 30.3 ±0.1 5 29.3 ±0.1 5 30.3 ±0.1 5 32.5 ±0.15 33.5 ±0.15 0.35±0.05 4.2 ±0.15 3.1 ±0.15 32.5±0.15 33.5±0.15 4.00 ±0.1 2.00 ±0.1 1.75 ±0.1 20.20 ±0.1 5 44.00 ±0.3 44.00 ±0.1 1.50 ±0.1 direction of feed c...

  • Page 78: Appendix A Reference

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 77 / 84 9 appendix a reference table 37: related documents sn document name remark [1] uc20_at_commands_manual uc20 at commands manual [2] uc20_evb_user_guide uc20 evb user guide [3] uc20_reference_design uc20 ...

  • Page 79

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 78 / 84 dce data communications equipment (typically module) dte data terminal equipment (typically computer, external controller) dtr data terminal ready dtx discontinuous transmission efr enhanced full rate e...

  • Page 80

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 79 / 84 pcb printed circuit board pdu protocol data unit ppp point-to-point protocol psk phase shift keying qam quadrature amplitude modulation qpsk quadrature phase shift keying rf radio frequency rhcp right h...

  • Page 81

    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 80 / 84 v ih min minimum input high level voltage value v il max maximum input low level voltage value v il min minimum input low level voltage value v i max absolute maximum input voltage value v i min absolut...

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    Umts/hspa module series uc20 hardware design uc20_hardware_design confidential / released 81 / 84.

  • Page 83

    Umts/hspa module uc20 hardware design uc20_hardware_design confidential / released 82 / 84.