Acces WM-IIRO-8 User Manual - page 14
14
Man ual W M-IIRO -8
W rite zeros to e very od d bit
SEND:
OAA
RECEIVE:
[CR]
Read Change-of-state
Y
Re ad C OS bit.
The pod can set a chan ge -of-s tate flag for any input th at h as been configured to do so. This
comm and will read then reset that bit. Therefore, this comm and will always return "N[CR]" unless the
T c om m and has first be en u sed to enable cha nge -of-s tate detec t for an y given b it.
If a chang e-of-state has bee n detected since the last "Y" com m and (see note), the pod will return
"Y[CR]" otherwise "N[CR]" will be returned.
Exam ples:
Rea d C OS b it
SEND:
Y
RECEIVE:
N[CR]
Note:
The addres s c om m an d fo r an y given pod w ill also return "Y" or "N" and clear the
Change-of-state flag in the pod.
Enable Change-of-State Detection
Txx
Set COS m ask
These com m ands co nfigure the bit-by-bit mask to enable change-of-state to set the COS flag on the
pod for readback by the "Y" or address comm ands. If a one is set for a particular bit, that bit will set
the C OS flag if/wh en th e bit ch ang es s tate. A zero w ill disable c han ge-o f-sta te de tection .
Note:
The COS Flag is read via eith er the "Y" c om m an d or a v alid address command. The COS
Flag is reset to FALSE by either comm and.
Selecting Which Edge Will Increment Counter
dx±
Set Digital inp ut ac tive state on bit x
dxx±
Set Digital input active state on bit xx
These comm ands allow you to set whether a rising or falling edge will increment the digital input
counter; i.e., if all bits are set to rising edge, the digital input counter for any given bit will increment
each time a rising edge is detected. "+" is rising edge, "-" is falling edge.
Exam ples:
Set bit 1 to rising edge ac tive
SEND:
D1+
or
SEND:
D01+
RECEIVE:
[CR]
Note:
The digital input counters are read with the "cxx" comm and, and reset with the "rxx"
comm and.