National Instruments DAQ PCI-MIO E Series User Manual
PCI-MIO E Series
User Manual
Multifunction I/O Boards for
PCI Bus Computers
January 1997 Edition
Part Number 320945B-01
© Copyright 1995, 1997 National Instruments Corporation. All Rights Reserved.
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Summary of DAQ PCI-MIO E Series
Page 1
Pci-mio e series user manual multifunction i/o boards for pci bus computers january 1997 edition part number 320945b-01 © copyright 1995, 1997 national instruments corporation. All rights reserved. Click here to comment on this document via the national instruments website at http://www.Natinst.Com/...
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Support@natinst.Com e-mail: info@natinst.Com ftp site: ftp.Natinst.Com web address: http://www.Natinst.Com bbs united states: (512) 794-5422 bbs united kingdom: 01635 551422 bbs france: 01 48 65 15 59 (512) 418-1111 tel: (512) 795-8248 fax: (512) 794-5678 australia 03 9879 5166, austria 0662 45 79 9...
Page 3: Important Information
Important information warranty the pci-mio e series boards are warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National instruments will, at its option, repair or replace equipment that proves...
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© national instruments corporation v pci-mio e series user manual table of contents about this manual organization of this manual ........................................................................................ Xi conventions used in this manual..................................................
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Table of contents pci-mio e series user manual vi © national instruments corporation chapter 3 hardware overview analog input ................................................................................................................. 3-3 input mode ................................................
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Table of contents © national instruments corporation vii pci-mio e series user manual power connections ....................................................................................................... 4-25 timing connections........................................................................
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Table of contents pci-mio e series user manual viii © national instruments corporation appendix c common questions appendix d customer communication glossary index figures figure 1-1. The relationship between the programming environment, ni-daq, and your hardware .......................................
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Table of contents © national instruments corporation ix pci-mio e series user manual figure 4-13. Scanclk signal timing..................................................................... 4-28 figure 4-14. Extstrobe* signal timing .............................................................. 4-29 ...
Page 11: Organization of This Manual
© national instruments corporation xi pci-mio e series user manual about this manual this manual describes the electrical and mechanical aspects of each board in the pci-mio e series product line and contains information concerning their operation and programming. Unless otherwise noted, text applie...
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About this manual pci-mio e series user manual xii © national instruments corporation • appendix a, specifications , lists the specifications of each pci-mio e series board. • appendix b, optional cable connector descriptions , describes the connectors on the optional cables for the pci-mio e series...
Page 13
About this manual © national instruments corporation xiii pci-mio e series user manual scxi scxi stands for signal conditioning extensions for instrumentation and is a national instruments product line designed to perform front-end signal conditioning for national instruments plug-in daq boards. ♦ t...
Page 14: Related Documentation
About this manual pci-mio e series user manual xiv © national instruments corporation worthwhile to look through the software documentation before you configure your hardware. • accessory installation guides or manuals—if you are using accessory products, read the terminal block and cable assembly i...
Page 15: Introduction
© national instruments corporation 1-1 pci-mio e series user manual chapter 1 introduction this chapter describes the pci-mio e series boards, lists what you need to get started, describes the optional software and optional equipment, and explains how to unpack your pci-mio e series board. About the...
Page 16: What You Need to Get Started
Chapter 1 introduction pci-mio e series user manual 1-2 © national instruments corporation bus interface and a ribbon cable to route timing and trigger signals between several functions on as many as five daq boards in your computer. The pci-mio e series boards can interface to an scxi system so tha...
Page 17: Software Programming Choices
Chapter 1 introduction © national instruments corporation 1-3 pci-mio e series user manual software programming choices you have several options to choose from when programming your national instruments daq and scxi hardware. You can use national instruments application software, ni-daq, or register...
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Chapter 1 introduction pci-mio e series user manual 1-4 © national instruments corporation ni-daq driver software the ni-daq driver software is included at no charge with all national instruments daq hardware. Ni-daq is not packaged with scxi or accessory products, except for the scxi-1200. Ni-daq h...
Page 19
Chapter 1 introduction © national instruments corporation 1-5 pci-mio e series user manual figure 1-1. The relationship between the programming environment, ni-daq, and your hardware register-level programming the final option for programming any national instruments daq hardware is to write registe...
Page 20: Optional Equipment
Chapter 1 introduction pci-mio e series user manual 1-6 © national instruments corporation optional equipment national instruments offers a variety of products to use with your pci-mio e series board, including cables, connector blocks, and other accessories, as follows: • cables and cable assemblie...
Page 21: Unpacking
Chapter 1 introduction © national instruments corporation 1-7 pci-mio e series user manual mating connectors and a backshell kit for making custom 68-pin cables are available from national instruments (part number 776832-01) ♦ pci-mio-16e-1, pci-mio-16e-4, pci-mio-16xe-10, and the pci-mio-16xe-50 ho...
Page 23: Installation and
© national instruments corporation 2-1 pci-mio e series user manual chapter 2 installation and configuration this chapter explains how to install and configure your pci-mio e series board. Software installation install your software before you install your pci-mio e series board. Refer to the approp...
Page 24: Board Configuration
Chapter 2 installation and configuration pci-mio e series user manual 2-2 © national instruments corporation 1. Write down the pci-mio e series board serial number in the pci-mio e series hardware and software configuration form in appendix d, customer communication, of this manual. 2. Turn off and ...
Page 25: Hardware Overview
© national instruments corporation 3-1 pci-mio e series user manual chapter 3 hardware overview this chapter presents an overview of the hardware functions on your pci-mio e series board. Figure 3-1 shows a block diagram for the pci-mio-16e-1 and pci-mio-16e-4. Figure 3-1. Pci-mio-16e-1 and pci-mio-...
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Chapter 3 hardware overview pci-mio e series user manual 3-2 © national instruments corporation figure 3-2 shows a block diagram for the pci-mio-16xe-10. Figure 3-2. Pci-mio-16xe-10 block diagram timing pfi / trigger i/o connector 3 2 2 rtsi bus digital i/o (8) 16-bit sampling a/d converter configur...
Page 27: Analog Input
Chapter 3 hardware overview © national instruments corporation 3-3 pci-mio e series user manual figure 3-3 shows a block diagram for the pci-mio-16xe-50. Figure 3-3. Pci-mio-16xe-50 block diagram analog input the analog input section of each pci-mio e series board is software configurable. You can s...
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Chapter 3 hardware overview pci-mio e series user manual 3-4 © national instruments corporation channel basis for multimode scanning. For example, you can configure the circuitry to scan 12 channels—four differentially-configured channels and eight single-ended channels. Table 3-1 describes the thre...
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Chapter 3 hardware overview © national instruments corporation 3-5 pci-mio e series user manual you can program polarity and range settings on a per channel basis so that you can configure each input channel uniquely. The software-programmable gain on these boards increases their overall flexibility...
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Chapter 3 hardware overview pci-mio e series user manual 3-6 © national instruments corporation ♦ pci-mio-16xe-10 and pci-mio-16xe-50 these boards have two input polarities—unipolar and bipolar. Unipolar input means that the input voltage range is between 0 and v ref , where v ref is a positive refe...
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Chapter 3 hardware overview © national instruments corporation 3-7 pci-mio e series user manual table 3-3 shows the overall input range and precision according to the input range configuration and gain used. Considerations for selecting input ranges which input polarity and range you select depends ...
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Chapter 3 hardware overview pci-mio e series user manual 3-8 © national instruments corporation dither when you enable dither, you add approximately 0.5 lsbrms of white gaussian noise to the signal to be converted by the adc. This addition is useful for applications involving averaging to increase t...
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Chapter 3 hardware overview © national instruments corporation 3-9 pci-mio e series user manual figure 3-4. Dither you cannot disable dither on the pci-mio-16xe-10 or pci-mio-16xe-50. This is because the adc resolution is so fine that the adc and the pgia inherently produce almost 0.5 lsbrms of nois...
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Chapter 3 hardware overview pci-mio e series user manual 3-10 © national instruments corporation when scanning among channels at various gains, the settling times may increase. When the pgia switches to a higher gain, the signal on the previous channel may be well outside the new, smaller range. For...
Page 35: Analog Output
Chapter 3 hardware overview © national instruments corporation 3-11 pci-mio e series user manual analog output ♦ pci-mio-16e-1 and pci-mio-16e-4 these pci-mio e series boards supply two channels of analog output voltage at the i/o connector. The reference and range for the analog output circuitry is...
Page 36
Chapter 3 hardware overview pci-mio e series user manual 3-12 © national instruments corporation selecting a bipolar range for a particular dac means that any data written to that dac will be interpreted as two’s complement format. In two’s complement mode, data values written to the analog output c...
Page 37: Analog Trigger
Chapter 3 hardware overview © national instruments corporation 3-13 pci-mio e series user manual analog trigger ♦ pci-mio-16e-1, pci-mio-16e-4, and pci-mio-16xe-10 in addition to supporting internal software triggering and external digital triggering to initiate a data acquisition sequence, the pci-...
Page 38
Chapter 3 hardware overview pci-mio e series user manual 3-14 © national instruments corporation there are five analog triggering modes available, as shown in figures 3-6 through 3-10. You can set lowvalue and highvalue independently in software. In below-low-level analog triggering mode, the trigge...
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Chapter 3 hardware overview © national instruments corporation 3-15 pci-mio e series user manual figure 3-8. Inside-region analog triggering mode in high-hysteresis analog triggering mode, the trigger is generated when the signal value is greater than highvalue, with the hysteresis specified by lowv...
Page 40: Digital I/o
Chapter 3 hardware overview pci-mio e series user manual 3-16 © national instruments corporation the analog trigger circuit generates an internal digital trigger based on the analog input signal and the user-defined trigger levels. This digital trigger can be used by any of the timing sections of th...
Page 41
Chapter 3 hardware overview © national instruments corporation 3-17 pci-mio e series user manual figure 3-11. Convert* signal routing this figure shows that convert* can be generated from a number of sources, including the external signals rtsi and pfi and the internal signals sample interval counte...
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Chapter 3 hardware overview pci-mio e series user manual 3-18 © national instruments corporation board and rtsi clocks many functions performed by the pci-mio e series boards require a frequency timebase to generate the necessary timing signals for controlling a/d conversions, dac updates, or genera...
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Chapter 3 hardware overview © national instruments corporation 3-19 pci-mio e series user manual figure 3-12. Rtsi bus signal connection refer to the timing connections section of chapter 4 for a description of the signals shown in figure 3-12. Rtsi bus connector switch rtsi switch clock trigger 7 d...
Page 45: Signal Connections
© national instruments corporation 4-1 pci-mio e series user manual chapter 4 signal connections this chapter describes how to make input and output signal connections to your pci-mio e series board via the board i/o connector. The i/o connector for the pci-mio-16e-1, pci-mio-16e-4, pci-mio-16xe-10,...
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Chapter 4 signal connections pci-mio e series user manual 4-2 © national instruments corporation figure 4-1. I/o connector pin assignment for the pci-mio e series boards 1 2 3 4 5 6 7 8 9 10 35 36 37 38 39 40 41 42 43 44 11 12 13 14 15 16 17 18 45 46 47 48 49 50 51 52 53 19 20 23 21 22 24 25 26 27 2...
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Chapter 4 signal connections © national instruments corporation 4-3 pci-mio e series user manual i/o connector signal descriptions signal name reference direction description aignd — — analog input ground—these pins are the reference point for single-ended measurements in rse configuration and the b...
Page 48
Chapter 4 signal connections pci-mio e series user manual 4-4 © national instruments corporation extstrobe* dgnd output external strobe—this output can be toggled under software control to latch signals or trigger events on external devices. Pfi0/trig1 dgnd input output pfi0/trigger 1—as an input, t...
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Chapter 4 signal connections © national instruments corporation 4-5 pci-mio e series user manual pfi5/update* dgnd input output pfi5/update—as an input, this is one of the pfis. As an output, this is the update* signal. A high-to-low edge on update* indicates that the analog output primary group is ...
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Chapter 4 signal connections pci-mio e series user manual 4-6 © national instruments corporation table 4-1 shows the i/o signal summary for the pci-mio-16e-1 and pci-mio-16e-4. Table 4-1. I/o signal summary, pci-mio-16e-1 and pci-mio-16e-4 signal name signal type and direction impedance input/ outpu...
Page 51
Chapter 4 signal connections © national instruments corporation 4-7 pci-mio e series user manual table 4-2 shows the i/o signal summary for the pci-mio-16xe-10. Pfi3/gpctr1_source dio — vcc +0.5 3.5 at (vcc -0.4) 5 at 0.4 1.5 50 k Ω pu pfi4/gpctr1_gate dio — vcc +0.5 3.5 at (vcc -0.4) 5 at 0.4 1.5 5...
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Chapter 4 signal connections pci-mio e series user manual 4-8 © national instruments corporation aignd ao — — — — — — dac0out ao 0.1 Ω short-circuit to ground 5 at 10 5 at -10 5 v/ µ s — dac1out ao 0.1 Ω short-circuit to ground 5 at 10 5 at -10 5 v/ µ s — aognd ao — — — — — — dgnd do — — — — — — vcc...
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Chapter 4 signal connections © national instruments corporation 4-9 pci-mio e series user manual table 4-3 shows the i/o signal summary for the pci-mio-16xe-50. Gpctr0_out do — — 3.5 at (vcc -0.4) 5 at 0.4 1.5 50 k Ω pu freq_out do — — 3.5 at (vcc-0.4) 5 at 0.4 1.5 50 k Ω pu ai = analog input dio = ...
Page 54
Chapter 4 signal connections pci-mio e series user manual 4-10 © national instruments corporation scanclk do — — 3.5 at (vcc -0.4) 5 at 0.4 1.5 50 k Ω pu extstrobe* do — — 3.5 at (vcc -0.4) 5 at 0.4 1.5 50 k Ω pu pfi0/trig1 dio — vcc +0.5 3.5 at (vcc -0.4) 5 at 0.4 1.5 50 k Ω pu pfi1/trig2 dio — vcc...
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Chapter 4 signal connections © national instruments corporation 4-11 pci-mio e series user manual analog input signal connections the analog input signals for the pci-mio e series boards are ach, aisense, and aignd. The ach signals are tied to the 16 analog input channels of your pci-mio e series bo...
Page 56
Chapter 4 signal connections pci-mio e series user manual 4-12 © national instruments corporation figure 4-2. Pci-mio e series pgia the pgia applies gain and common-mode voltage rejection and presents high input impedance to the analog input signals connected to your pci-mio e series board. Signals ...
Page 57: Types of Signal Sources
Chapter 4 signal connections © national instruments corporation 4-13 pci-mio e series user manual types of signal sources when configuring the input channels and making signal connections, you must first determine whether the signal sources are floating or ground-referenced. The following sections d...
Page 58
Chapter 4 signal connections pci-mio e series user manual 4-14 © national instruments corporation figure 4-3 summarizes the recommended input configuration for both types of signal sources. Figure 4-3. Summary of analog input connections input differential (diff) single-ended — ground referenced (rs...
Page 59
Chapter 4 signal connections © national instruments corporation 4-15 pci-mio e series user manual differential connection considerations (diff input configuration) a differential connection is one in which the pci-mio e series board analog input signal has its own reference signal or signal return p...
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Chapter 4 signal connections pci-mio e series user manual 4-16 © national instruments corporation differential connections for ground-referenced signal sources figure 4-4 shows how to connect a ground-referenced signal source to a channel on the pci-mio e series board configured in diff input mode. ...
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Chapter 4 signal connections © national instruments corporation 4-17 pci-mio e series user manual differential connections for nonreferenced or floating signal sources figure 4-5 shows how to connect a floating signal source to a channel on the pci-mio e series board configured in diff input mode. F...
Page 62
Chapter 4 signal connections pci-mio e series user manual 4-18 © national instruments corporation however, for larger source impedances, this connection leaves the differential signal path significantly out of balance. Noise that couples electrostatically onto the positive line does not couple onto ...
Page 63
Chapter 4 signal connections © national instruments corporation 4-19 pci-mio e series user manual you can use single-ended input connections for any input signal that meets the following conditions: • the input signal is high level (greater than 1 v). • the leads connecting the signal to the pci-mio...
Page 64
Chapter 4 signal connections pci-mio e series user manual 4-20 © national instruments corporation single-ended connections for floating signal sources (rse configuration) figure 4-6 shows how to connect a floating signal source to a channel on the pci-mio e series board configured for rse mode. Figu...
Page 65
Chapter 4 signal connections © national instruments corporation 4-21 pci-mio e series user manual figure 4-7 shows how to connect a grounded signal source to a channel on the pci-mio e series board configured for nrse mode. Figure 4-7. Single-ended input connections for ground-referenced signals com...
Page 66
Chapter 4 signal connections pci-mio e series user manual 4-22 © national instruments corporation analog output signal connections the analog output signals are dac0out, dac1out, extref, and aognd. Extref is not available on the pci-mio-16xe-10 or pci-mio-16xe-50. Dac0out is the voltage output signa...
Page 67
Chapter 4 signal connections © national instruments corporation 4-23 pci-mio e series user manual . Figure 4-8. Analog output connections the external reference signal can be either a dc or an ac signal. The board multiplies this reference signal by the dac code (divided by the full-scale dac code) ...
Page 68
Chapter 4 signal connections pci-mio e series user manual 4-24 © national instruments corporation figure 4-9 shows signal connections for three typical digital i/o applications. Figure 4-9. Digital i/o connections figure 4-9 shows dio configured for digital input and dio configured for digital outpu...
Page 69: Power Connections
Chapter 4 signal connections © national instruments corporation 4-25 pci-mio e series user manual power connections two pins on the i/0 connector supply +5 v from the computer power supply via a self-resetting fuse. The fuse will reset automatically within a few seconds after the overcurrent conditi...
Page 70
Chapter 4 signal connections pci-mio e series user manual 4-26 © national instruments corporation all digital timing connections are referenced to dgnd. This reference is demonstrated in figure 4-10, which shows how to connect an external trig1 source and an external convert* source to two pci-mio e...
Page 71
Chapter 4 signal connections © national instruments corporation 4-27 pci-mio e series user manual as an input, you can individually configure each pfi for edge or level detection and for polarity selection, as well. You can use the polarity selection for any of the 13 timing signals, but the edge or...
Page 72
Chapter 4 signal connections pci-mio e series user manual 4-28 © national instruments corporation figure 4-12. Typical pretriggered acquisition scanclk signal scanclk is an output-only signal that generates a pulse with the leading edge occurring approximately 50 to 100 ns after an a/d conversion be...
Page 73
Chapter 4 signal connections © national instruments corporation 4-29 pci-mio e series user manual extstrobe* signal extstrobe* is an output-only signal that generates either a single pulse or a sequence of eight pulses in the hardware-strobe mode. An external device can use this signal to latch sign...
Page 74
Chapter 4 signal connections pci-mio e series user manual 4-30 © national instruments corporation as an output, the trig1 signal reflects the action that initiates a daq sequence. This is true even if the acquisition is being externally triggered by another pfi. The output is an active high pulse wi...
Page 75
Chapter 4 signal connections © national instruments corporation 4-31 pci-mio e series user manual trig2 signal any pfi pin can externally input the trig2 signal, which is available as an output on the pfi1/trig2 pin. Refer to figure 4-12 for the relationship of trig2 to the daq sequence. As an input...
Page 76
Chapter 4 signal connections pci-mio e series user manual 4-32 © national instruments corporation figure 4-18. Trig2 output signal timing startscan signal any pfi pin can externally input the startscan signal, which is available as an output on the pfi7/startscan pin. Refer to figures 4-11 and 4-12 ...
Page 77
Chapter 4 signal connections © national instruments corporation 4-33 pci-mio e series user manual figure 4-19. Startscan input signal timing figure 4-20. Startscan output signal timing rising-edge polarity falling-edge polarity tw tw = 10 ns minimum b. Scan in progress, two conversions per scan tw =...
Page 78
Chapter 4 signal connections pci-mio e series user manual 4-34 © national instruments corporation the convert* pulses are masked off until the board generates the startscan signal. If you are using internally generated conversions, the first convert* appears when the onboard sample interval counter ...
Page 79
Chapter 4 signal connections © national instruments corporation 4-35 pci-mio e series user manual figure 4-21. Convert* input signal timing figure 4-22. Convert* output signal timing the adc switches to hold mode within 60 ns of the selected edge. This hold-mode delay time is a function of temperatu...
Page 80
Chapter 4 signal connections pci-mio e series user manual 4-36 © national instruments corporation aigate signal any pfi pin can externally input the aigate signal, which is not available as an output on the i/o connector. The aigate signal can mask off scans in a daq sequence. You can configure the ...
Page 81
Chapter 4 signal connections © national instruments corporation 4-37 pci-mio e series user manual figure 4-23. Sisource signal timing waveform generation timing connections the analog group defined for your pci-mio e series board is controlled by wftrig, update*, and uisource. Wftrig signal any pfi ...
Page 82
Chapter 4 signal connections pci-mio e series user manual 4-38 © national instruments corporation figure 4-24. Wftrig input signal timing figure 4-25. Wftrig output signal timing update* signal any pfi pin can externally input the update* signal, which is available as an output on the pfi5/update* p...
Page 83
Chapter 4 signal connections © national instruments corporation 4-39 pci-mio e series user manual as an output, the update* signal reflects the actual update pulse that is connected to the dacs. This is true even if the updates are being externally generated by another pfi. The output is an active l...
Page 84
Chapter 4 signal connections pci-mio e series user manual 4-40 © national instruments corporation d/a conversions generated by either an internal or external update* signal do not occur when gated by the software command register gate. Uisource signal any pfi pin can externally input the uisource si...
Page 85
Chapter 4 signal connections © national instruments corporation 4-41 pci-mio e series user manual gpctr0_source signal any pfi pin can externally input the gpctr0_source signal, which is available as an output on the pfi8/gpctr0_source pin. As an input, the gpctr0_source signal is configured in the ...
Page 86
Chapter 4 signal connections pci-mio e series user manual 4-42 © national instruments corporation gpctr0_gate signal any pfi pin can externally input the gpctr0_gate signal, which is available as an output on the pfi9/gpctr0_gate pin. As an input, the gpctr0_gate signal is configured in the edge-det...
Page 87
Chapter 4 signal connections © national instruments corporation 4-43 pci-mio e series user manual figure 4-31. Gpctr0_out signal timing gpctr0_up_down signal this signal can be externally input on the dio6 pin and is not available as an output on the i/o connector. The general-purpose counter 0 will...
Page 88
Chapter 4 signal connections pci-mio e series user manual 4-44 © national instruments corporation figure 4-32. Gpctr1_source signal timing the maximum allowed frequency is 20 mhz, with a minimum pulse width of 23 ns high or low. There is no minimum frequency limitation. The 20 mhz or 100 khz timebas...
Page 89
Chapter 4 signal connections © national instruments corporation 4-45 pci-mio e series user manual figure 4-33. Gpctr1_gate signal timing in edge-detection mode gpctr1_out signal this signal is available only as an output on the gpctr1_out pin. The gpctr1_out signal monitors the tc board general-purp...
Page 90
Chapter 4 signal connections pci-mio e series user manual 4-46 © national instruments corporation gpctr1_up_down signal this signal can be externally input on the dio7 pin and is not available as an output on the i/o connector. General-purpose counter 1 counts down when this pin is at a logic low an...
Page 91
Chapter 4 signal connections © national instruments corporation 4-47 pci-mio e series user manual the gate input timing parameters are referenced to the signal at the source input or to one of the internally generated signals on your pci-mio e series board. Figure 4-35 shows the gate signal referenc...
Page 92: Field Wiring Considerations
Chapter 4 signal connections pci-mio e series user manual 4-48 © national instruments corporation field wiring considerations environmental noise can seriously affect the accuracy of measurements made with your pci-mio e series board if you do not take proper care when running signal wires between s...
Page 93: Calibration
© national instruments corporation 5-1 pci-mio e series user manual chapter 5 calibration this chapter discusses the calibration procedures for your pci-mio e series board. If you are using the ni-daq device driver, that software includes calibration functions for performing all of the steps in the ...
Page 94: Self-Calibration
Chapter 5 calibration pci-mio e series user manual 5-2 © national instruments corporation this method of calibration is not very accurate because it does not take into account the fact that the board measurement and output voltage errors can vary with time and temperature. It is better to self-calib...
Page 95: Other Considerations
Chapter 5 calibration © national instruments corporation 5-3 pci-mio e series user manual to externally calibrate your board, be sure to use a very accurate external reference. The reference should be several times more accurate than the board itself. For example, to calibrate a 16-bit board, the ex...
Page 97: Specifications
© national instruments corporation a-1 pci-mio e series user manual appendix a specifications this appendix lists the specifications of each pci-mio e series board. These specifications are typical at 25 ° c unless otherwise noted. Pci-mio-16e-1 and pci-mio-16e-4 analog input input characteristics n...
Page 98
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 pci-mio e series user manual a-2 © national instruments corporation input signal ranges input coupling .........................................Dc maximum working voltage (signal and common mode) .............Each input should remain with...
Page 99
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 © national instruments corporation a-3 pci-mio e series user manual transfer characteristics relative accuracy ................................... ± 0.5 lsb typ dithered, ± 1.5 lsb max undithered dnl .........................................
Page 100
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 pci-mio e series user manual a-4 © national instruments corporation cmrr, all input ranges, dc to 60 hz dynamic characteristics bandwidth gain cmrr pci-mio-16e-1 pci-mio-16e-4 0.5 95 db 90 db 1 100 db 95 db ≥ 2 106 db 100 db board small s...
Page 101
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 © national instruments corporation a-5 pci-mio e series user manual settling time to full-scale step system noise (lsbrms, not including quantization) crosstalk................................................. -80 db, dc to 100 khz board ...
Page 102
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 pci-mio e series user manual a-6 © national instruments corporation stability recommended warm-up time.................15 min. Offset temperature coefficient pregain ............................................. ± 5 µ v/ ° c postgain .......
Page 103
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 © national instruments corporation a-7 pci-mio e series user manual transfer characteristics relative accuracy (inl) after calibration .............................. ± 0.3 lsb typ, ± 0.5 lsb max before calibration............................
Page 104
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 pci-mio e series user manual a-8 © national instruments corporation input impedance ..............................10 k Ω bandwidth (-3 db) ...........................1 mhz dynamic characteristics settling time for full-scale step............
Page 105
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 © national instruments corporation a-9 pci-mio e series user manual digital logic levels power-on state........................................ Input (high-z) data transfers ......................................... Programmed i/o timing ...
Page 106
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 pci-mio e series user manual a-10 © national instruments corporation data transfers ..........................................Dma, interrupts, programmed i/o dma modes............................................Scatter gather triggers ana...
Page 107
Appendix a specifications for pci-mio-16e-1 and pci-mio-16e-4 © national instruments corporation a-11 pci-mio e series user manual rtsi trigger lines.......................................... Seven bus interface type ....................................................... Master, slave power require...
Page 108: Pci-Mio-16Xe-10
© national instruments corporation a-12 pci-mio e series user manual pci-mio-16xe-10 analog input input characteristics number of channels................................16 single-ended or 8 differential (software-selectable) type of adc ..........................................Successive approxima...
Page 109
Appendix a specifications for pci-mio-16xe-10 © national instruments corporation a-13 pci-mio e series user manual data transfers ......................................... Dma, interrupts, programmed i/o dma modes ........................................... Scatter gather configuration memory size.....
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Appendix a specifications for pci-mio-16xe-10 pci-mio e series user manual a-14 © national instruments corporation cmrr, dc to 60 hz dynamic characteristics bandwidth (-3 db) all gains...........................................255 khz settling time for full-scale step (dc to all gains and ranges) sy...
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Appendix a specifications for pci-mio-16xe-10 © national instruments corporation a-15 pci-mio e series user manual stability recommended warm-up time ................ 15 min. Offset temperature coefficient pregain ............................................ ± 5 µ v/ ° c postgain.......................
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Appendix a specifications for pci-mio-16xe-10 pci-mio e series user manual a-16 © national instruments corporation gain error (relative to internal reference) after calibration............................... ± 30.5 ppm max before calibration ............................ ± 2,000 ppm max voltage outpu...
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Appendix a specifications for pci-mio-16xe-10 © national instruments corporation a-17 pci-mio e series user manual digital i/o number of channels ............................... 8 input/output compatibility ......................................... Ttl/cmos digital logic levels power-on state..........
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Appendix a specifications for pci-mio-16xe-10 pci-mio e series user manual a-18 © national instruments corporation max source frequency.............................20 mhz min source pulse duration .....................10 ns, edge-detect mode min gate pulse duration .........................10 ns, ed...
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Appendix a specifications for pci-mio-16xe-10 © national instruments corporation a-19 pci-mio e series user manual rtsi trigger lines.......................................... 7 bus interface type ....................................................... Master, slave power requirement +5 vdc ( ± 5%)....
Page 116: Pci-Mio-16Xe-50
© national instruments corporation a-20 pci-mio e series user manual pci-mio-16xe-50 analog input input characteristics number of channels................................16 single-ended, or 8 differential (software-selectable) type of adc ..........................................Successive approxim...
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Appendix a specifications for pci-mio-16xe-50 © national instruments corporation a-21 pci-mio e series user manual data transfers ......................................... Dma, interrupts, programmed i/o dma modes ........................................... Scatter-gather configuration memory size.....
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Appendix a specifications for pci-mio-16xe-50 pci-mio e series user manual a-22 © national instruments corporation dynamic characteristics bandwidth gain = 1, 2 .......................................63 khz gain = 10 .........................................57 khz gain = 100 ...........................
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Appendix a specifications for pci-mio-16xe-50 © national instruments corporation a-23 pci-mio e series user manual fifo buffer size ..................................... None data transfers ......................................... Dma, interrupts, programmed i/o dma modes .............................
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Appendix a specifications for pci-mio-16xe-50 pci-mio e series user manual a-24 © national instruments corporation stability offset temperature coefficient ................ ± 25 µ v/ ° c gain temperature coefficient .................. ± 15 ppm/ ° c onboard calibration reference level ..................
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Appendix a specifications for pci-mio-16xe-50 © national instruments corporation a-25 pci-mio e series user manual frequency scaler ............................. 4 bits compatibility ......................................... Ttl/cmos base clocks available counter/timers.................................
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Appendix a specifications for pci-mio-16xe-50 pci-mio e series user manual a-26 © national instruments corporation physical dimensions (not including connectors) ....................17.5 by 9.9 cm (6.9 by 3.9 in) i/o connector ..........................................68-pin male scsi-ii type enviro...
Page 123: Optional Cable Connector
© national instruments corporation b-1 pci-mio e series user manual appendix b optional cable connector descriptions this appendix describes the connectors on the optional cables for the pci-mio e series boards. Figure b-1 shows the pin assignments for the 68-pin mio connector. This connector is ava...
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Appendix b optional cable connector descriptions pci-mio e series user manual b-2 © national instruments corporation figure b-1. 68-pin mio connector pin assignments 1 2 3 4 5 6 7 8 9 10 35 36 37 38 39 40 41 42 43 44 11 12 13 14 15 16 17 18 45 46 47 48 49 50 51 52 53 19 20 23 21 22 24 25 26 27 28 29...
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Appendix b optional cable connector descriptions © national instruments corporation b-3 pci-mio e series user manual figure b-2 shows the pin assignments for the 50-pin mio connector. This connector is available when you use the sh6850 or r6850 cable assemblies with the pci-mio-16e-1, pci-mio-16e-4,...
Page 127: Common Questions
© national instruments corporation c-1 pci-mio e series user manual appendix c common questions this appendix contains a list of commonly asked questions and their answers relating to usage and special features of your pci-mio e series board. General information 1. What are the pci-mio e series boar...
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Appendix c common questions pci-mio e series user manual c-2 © national instruments corporation pci-mio e series boards have settling times that vary with gain and accuracy. See appendix a for exact specifications. 4. What type of 5 v protection do the pci-mio e series boards have? The pci-mio e ser...
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Appendix c common questions © national instruments corporation c-3 pci-mio e series user manual maintaining a high common-mode rejection ratio (cmrr). These methods are outlined in chapter 4, signal connections. 10. I’m using the dacs to generate a waveform, but i discovered with a digital oscillosc...
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Appendix c common questions pci-mio e series user manual c-4 © national instruments corporation c. Initiate analog input data acquisition, which will start only when the analog output waveform generation starts. D. Initiate analog output waveform generation. Timing and digital i/o 12. What types of ...
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Appendix c common questions © national instruments corporation c-5 pci-mio e series user manual work with the daq-stc. The gpctr functions have the same capabilities as the ictr and ctr functions, plus more, but you must rewrite the application with the gpctr function calls. 16. I’m using one of the...
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Appendix c common questions pci-mio e series user manual c-6 © national instruments corporation 18. What are the power-on states of the pfi and dio lines on the i/o connector? At system power-on and reset, both the pfi and dio lines are set to high impedance by the hardware. This means that the boar...
Page 133: Customer Communication
© national instruments corporation d-1 pci-mio e series user manual appendix d customer communication for your convenience, this appendix contains forms to help you gather the information necessary to help us solve your technical problems and a form you can use to comment on the product documentatio...
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Fax-on-demand is a 24-hour information retrieval system containing a library of documents on a wide range of technical information. You can access fax-on-demand from a touch-tone telephone at (512) 418-1111. You can submit technical support questions to the applications engineering team through e-ma...
Page 135: Technical Support Form
Technical support form photocopy this form and update it each time you make changes to your software or hardware, and use the completed copy of this form as a reference for your current configuration. Completing this form accurately before contacting national instruments for technical support helps ...
Page 136: Configuration Form
Pci-mio e series hardware and software configuration form record the settings and revisions of your hardware and software on the line to the right of each item. Complete a new copy of this form each time you revise your software or hardware configuration, and use this form as a reference for your cu...
Page 137: Documentation Comment Form
Documentation comment form national instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: pci-mio e series user manual edition date: january 1997 part number: 320945b-01 please comment on t...
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© national instruments corporation g-1 pci-mio e series user manual glossary symbols/numbers ˚ degrees > greater than ≥ greater than or equal to less than ≤ less than or equal to / per % percent ± plus or minus prefix meaning value p- pico- 10 - 12 n- nano- 10 - 9 µ - micro- 10 - 6 m- milli- 10 - 3 ...
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Glossary pci-mio e series user manual g-2 © national instruments corporation + positive of, or plus – negative of, or minus Ω ohms square root of +5 v +5 vdc source signal a a amperes ac alternating current ach analog input channel signal a/d analog-to-digital adc analog-to-digital converter—an elec...
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Glossary © national instruments corporation g-3 pci-mio e series user manual b bios basic input/output system—bios functions are the fundamental level of any pc or compatible computer. Bios functions embody the basic operations needed for successful use of the computer’s hardware resources. Bipolar ...
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Glossary pci-mio e series user manual g-4 © national instruments corporation dac0out analog channel 0 output signal dac1out analog channel 1 output signal daq data acquisition—a system that uses the computer to collect, receive, and generate electrical signals db decibel–the unit for expressing a lo...
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Glossary © national instruments corporation g-5 pci-mio e series user manual f fifo first-in first-out memory buffer—fifos are often used on daq devices to temporarily store incoming or outgoing data until that data can be read or written. For example, an analog input fifo stores the results of a/d ...
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Glossary pci-mio e series user manual g-6 © national instruments corporation h h hour hex hexadecimal hz hertz i i/o input/output—the transfer of data to/from a computer system involving communications channels, operator interface devices, and/or data acquisition and control interfaces i oh current,...
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Glossary © national instruments corporation g-7 pci-mio e series user manual n nc normally closed, or not connected ni-daq ni driver software for daq hardware noise an undesirable electrical signal—noise comes from external sources such as the ac power line, motors, generators, transformers, fluores...
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Glossary pci-mio e series user manual g-8 © national instruments corporation pfi5/update* pfi5/update pfi6/wftrig pfi6/waveform trigger pfi7/startscan pfi7/start of scan pfi8/gpctr0_source pfi8/general purpose counter 0 source pfi9/gpctr0_gate pfi9/general purpose counter 0 gate pgia programmable ga...
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Glossary © national instruments corporation g-9 pci-mio e series user manual scxi signal conditioning extensions for instrumentation—the national instruments product line for conditioning low-level signals within an external chassis near sensors so only high-level signals are sent to daq boards in t...
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Glossary pci-mio e series user manual g-10 © national instruments corporation t sc source clock period t sp source pulse width ttl transistor-transistor logic u ui update interval uisource update interval counter clock signal unipolar a signal range that is always positive (for example, 0 to +10 v) ...
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Glossary © national instruments corporation g-11 pci-mio e series user manual w waveform multiple voltage readings taken at a specific sampling rate wftrig waveform generation trigger signal.
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© national instruments corporation i -1 pci-mio e series user manual index numbers +5 v signal description, 4-3 power connections, 4-25 protection provided with pci-mio e series, c-2 a ach signal description (table), 4-3 i/o signal summary (table) pci-mio-16e-1 and pci-mio-16e-4, 4-6 pci-mio-16xe-10...
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Index pci-mio e series user manual i -2 © national instruments corporation analog trigger, 3-13 to 3-16 above-high-level analog triggering mode (figure), 3-14 below-low-level analog triggering mode (figure), 3-14 block diagram, 3-13 high-hysteresis analog triggering mode (figure), 3-15 inside-region...
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Index © national instruments corporation i -3 pci-mio e series user manual i/o signal summary (table) pci-mio-16e-1 and pci-mio-16e-4, 4-6 pci-mio-16xe-10, 4-8 pci-mio-16xe-50, 4-9 dac1out signal analog output connections, 4-22 to 4-23 description (table), 4-3 i/o signal summary (table) pci-mio-16e-...
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Index pci-mio e series user manual i -4 © national instruments corporation organization of manual, ixi to xii related documentation, xiv dynamic characteristics analog input pci-mio-16e-1 and pci-mio-16e-4, a-4 to a-5 pci-mio-16xe-10, a-14 pci-mio-16xe-50, a-22 analog output pci-mio-16e-1 and pci-mi...
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Index © national instruments corporation i -5 pci-mio e series user manual i/o signal summary (table) pci-mio-16e-1 and pci-mio-16e-4, 4-7 pci-mio-16xe-10, 4-9 pci-mio-16xe-50, 4-10 waveform generation timing connections, 4-42 to 4-43 gpctr0_source signal, 4-41 gpctr0_up_down signal, 4-43 gpctr1_gat...
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Index pci-mio e series user manual i -6 © national instruments corporation recommended configuration (figure), 4-14 single-ended connections, 4-18 to 4-21 floating signal sources (rse configuration), 4-20 grounded signal sources (nrse configuration), 4-20 to 4-21 input polarity and range, 3-4 to 3-7...
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Index © national instruments corporation i -7 pci-mio e series user manual optional equipment, 1-6 requirements for getting started, 1-2 software programming choices national instruments application software, 1-3 ni-daq driver software, 1-4 to 1-5 register-level programming, 1-5 unpacking, 1-7 pfi0/...
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Index pci-mio e series user manual i -8 © national instruments corporation pfis (programmable function inputs), 4-26 to 4-27 overview, 4-25 questions about pci-mio e series boards, c-5 to c-6 signal routing, 3-17 timing i/o connections, 4-26 to 4-27 illustration, 4-26 pgia (programmable gain instrum...
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Index © national instruments corporation i -9 pci-mio e series user manual s scanclk signal description (table), 4-3 i/o signal summary (table) pci-mio-16e-1 and pci-mio-16e-4, 4-6 pci-mio-16xe-10, 4-8 pci-mio-16xe-50, 4-10 timing connections, 4-28 settling time, 3-9 to 3-10 signal connections analo...
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Index pci-mio e series user manual i -10 © national instruments corporation gpctr1_up_down signal, 4-46 to 4-47 programmable function input connections, 4-26 to 4-27 waveform generation timing connections, 4-37 to 4-40 uisource signal, 4-40 update* signal, 4-38 to 4-40 wftrig signal, 4-37 to 4-38 ty...
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Index © national instruments corporation i -11 pci-mio e series user manual pci-mio-16xe-50, a-22 analog output pci-mio-16e-1 and pci-mio-16e-4, a-8 pci-mio-16xe-10, a-16 pci-mio-16xe-50, a-24 startscan signal, 4-32 to 4-34 input timing (figure), 4-33 output timing (figure), 4-33 t technical support...
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Index pci-mio e series user manual i -12 © national instruments corporation output timing (figure), 4-32 triggers analog, 3-13 to 3-16 above-high-level analog triggering mode (figure), 3-14 below-low-level analog triggering mode (figure), 3-14 block diagram, 3-13 high-hysteresis analog triggering mo...