PMC-Sierra PM5350 Features
PM5350
PMC-Sierra,Inc.
155 Mb/s SATURN User Network Interface
S/UNI-155-ULTRA
PMC-960709 (R4)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
1998 PMC-Sierra, Inc.
FEATURES
• Low-cost, monolithic SATURN
®
SONET/SDH ATM User Network
Interface (UNI) for category-5 (UTP-5),
Shielded Twisted Pair (STP) and
optical applications.
• Implements the ATM Transmission
Convergence (TC) sublayer according
to ATM Forum specifications using the
SONET/SDH 155.52 Mb/s STS- 3c/
STM-1 and 51.84 Mb/s STS-1 formats.
• Provides on-chip UTP/STP drivers,
receivers, and line equalizers to allow
direct connection to 155 Mb/s UTP-5
or STP twisted pair wiring facilities
using line coupling transformers.
• Provides a selectable UTP/STP or
Pseudo-ECL (PECL) interface to allow
direct connection to Optical Data Links
(ODLs).
• Includes clock recovery and clock
synthesis with on-chip loop filters.
• Operates in timing master or timing
slave (loop timed) modes.
• Frames to SONET/SDH framing bytes
(A1, A2), processes the section and
line Bit Interleaved Parity (B1, B2) and
the Far-End Block Error (Z2) bytes.
• Interprets the H1, H2, and H3 payload
pointer bytes.
• Processes the SONET path overhead
BIP-8 (B3), signal label (C2) and path
status (G1) bytes.
• Inserts and extracts ATM payloads
using ATM cell delineation.
• Provides on-chip FIFO buffers in both
transmit and receive paths.
• Provides on-chip support for GFC and
XOFF flow control.
• Provides a synchronous 8-bit plus
parity SATURN-Compliant Interface for
PHYsical layer devices (SCI-PHY™)
bus operating at 50 MHz.
• Compatible with ATM Forum UTOPIA
interface format.
• Provides a generic 8-bit
microprocessor bus interface for
configuration, control, and monitoring.
• Provides TTL-compatible inputs and
outputs and differential PECL inputs.
• Low power, +5 V CMOS technology.
• Packaged in a 128-pin, 14 mm by
20 mm Plastic Quad Flat Pack (PQFP)
with 0.5 mm lead pitch.
APPLICATIONS
• 155.52 or 51.84 Mb/s twisted pair or
optical ATM LANs
• Workstations and Personal Computer
NIC Cards
• Switches, Hubs, and Router Port
Cards
• SONET- or SDH-Compliant ATM UNIs
BLOCK DIAGRAM
Analog Edge
D[7
:0
]
A[
1
0
:0
]
CSB
WRB
RD
B
INT
B
Microprocessor
Interface
RST
B
RXD+
RXD-
TXD+
TXD-
TCA
TWRENB
TFCLK
RRDENB
RFCLK
RDAT[7:0]
RCA
RSOC
RXPRTY
TSEN
TXPRTY
TDAT[7:0]
TSOC
Transmit
ATM
4-Cell FIFO
LED
Control
Serial
to
Parallel
Receive
ATM Cell
Processor
Twisted
Pair Rx
Clock/Data
Recovery
Clock
Generator
TC
P
TG
F
C
XO
FF
TC
L
K
TF
P
AT
P2
REF
C
L
K
TV
R
E
F
T
RRE
F
RG
F
C
RC
P
RF
P
RCL
K
OUT
[1
:0]
AT
P1
RCAP2
RCAP1
PECL
S
EI
Twisted
Pair Tx
SD
Receive
ATM
4-Cell FIFO
Receive
Framer and
Overhead
Processor
Parallel
to
Serial
Transmit
Framer and
Overhead
Processor
Transmit
ATM Cell
Processor
AL
E