Ramsey Electronics FM25A Assembly And Instruction Manual - page 5
FM25A
• 5
CIRCUIT DESCRIPTION
We will begin by talking about the power supply of your new FM25A. While a
DC power source is provided with the FM25A, the DC isn’t ‘proper’ enough to
provide us with the low-noise, stable supply that we would like for good audio
quality. Voltage regulator VR3 provides us with a means to take the raw DC
output from the wall transformer and ‘smooth’ it out, keeping it at a constant 12
volts. Filter capacitor C5 reduces ripple noise from the DC wall transformer.
VR1 provides us with a good clean +5 volts for the CMOS circuits of U1 and
U2, while VR2 gives us about 2.6-2.8 volts which is what the custom IC U3
likes to see.
The custom FM stereo IC (U3) is the heart of the FM25A. The control of U3 is
determined by its surrounding circuitry. Potentiometers R11 and R16 allow for
adjustment of the audio levels. Resistors R9 and R15 set the pre-emphasis
characteristics (75 µs for USA, 50 µs for Europe). R6 permits adjustment of ste-
reo balance and L1 and D21 form an adjustable resonant circuit to set the car-
rier operating frequency. Y2, C32, and C30 provide the 38 KHz subcarrier for
stereo transmission. C33, R22, R21 and C34 set the proper multiplexed audio
carrier levels for the modulator. The combined modulated RF signal is seen on
pin 7 of U3, and is amplified by Q3 and surrounding biasing components.
Q3 amplifies the output of U3. This signal is fed to U1 through C26 and R12
which is the transmitted frequency feedback for the PLL to compare the crystal
frequency to. It is also fed to Q2 through C29 and R19. Q2 provides further am-
plification before the signal goes to the low pass filter. The low pass RF filter
consisting of C35, L2, C36, L3, and C37 allows us to pass the fundamental
(operating) frequency while rejecting the harmonics. Harmonics are multiples of
the fundamental frequency, and in this case are undesirable in transmission
since they can transmit in critical areas of the RF spectrum.
U2 is the brains of the whole circuit. This micro-controller looks at the settings
of each of the dip switches S3 through S5 one at a time and from these it calcu-
lates the desired frequency. On these switches you add up the closed positions
1, 2, 4, and 8 to make to make any number between 0 and 9. For example clos-
ing position 1 and 8 on S3 (10 MHz switch) is equal to 90 MHz, plus closing 1
and 4 on S4 (1 MHz switch) is equal to 5 MHz, while closing 2 and 1 on S5 (0.1
MHz switch) is equal to 0.3 MHz. This makes the final frequency equal to 95.3
MHz. These switches may be set to any frequency between 88 and 108 MHz.
To set the frequency above 100 MHz, the S3 positions must add up to ten. Any
switch setting greater than 9, with the exception of S3, is invalid and will be
read as 0.
Once this frequency is determined, the information needed to control U1 is sent
serially from U2. This information is a string of binary data, (1's and 0's). In this
way data is sent one bit at a time to U1. The frequency information takes 16
bits, and there are an additional 32 bits sent for the internal control of U1. You