XTA dp200 Operator's Manual - page 28
DP200 Page 28
IMPORTANT: The functions of AES Receive modes 1 and 4 are discussed for the
purpose of completeness only, since their use is limited on the standard (non-
optical) AES/EBU unit. Since simultaneous AES/analogue signals are not possible
on the standard unit, the ‘auto’ mode will normally be used, with manual selection of
AES or analogue source still required via the rear panel switch.
To access this mode, press [MENU] and select AES receive mode using
[MENU]/[SCROLL] keys or ‘Frequency’ control, then press [ENTER]. Use
‘Frequency’ control to view options as follows:-
1. Analogue - Input is analogue only. Any AES/EBU signal is ignored.
2. AES - Inputs is always AES/EBU. If the AES/EBU signal is corrupt, outputs will
mute. Analogue input signal is ignored.
3. Auto - If a valid AES/EBU signal is detected this is used as the preferred
source. If an invalid AES/EBU signal is present (or no AES/EBU signal) then the
analogue signal will be used, if available.
4. Reference - Input is selected to analogue, but the external AES signal is used
to control the sample rate of the DP200. In this way the AES/EBU outputs are
referenced-locked to the incoming AES clock.
AES Diagnostics:
The DP200 includes comprehensive AES/EBU diagnostic programs to enable the
incoming signal to be checked for quality and validity.
To access this mode, press [MENU] and select ‘AES Diagnostics’, using the
‘Frequency control’, the press [ENTER].
If no valid AES signal is present the display will show AES status: ‘not locked’. If the
signal is present, pressing the scroll key selects between the following options:-
AES Status:
1. Not Locked - No valid AES signal present.
2. OK - Valid AES signal present.
3. Chan Stat Chg - Channel status change.
4. SLIP - Shows errors are present due to non-synchronous clock.
AES Errors:
1. None - No errors present.
2. CNF - Confidence ( quality of signal).
3. Code - error in AES code (bi-phase coding error).
4. Parity - error in AES code (bit error).
5. Validity - error in AES code (validity bit set).
AES Frequency:
Displays current AES clock rate and tolerance, e.g. ’48 kHz +/- 400 ppm’.