E2v AT84AS003-EB User Manual - Section 3
AT84AS003-EB Evaluation Kit User Guide
3-1
0905C–BDC–09/07
Section 3
Operating Characteristics
3.1
Introduction
This section describes a typical configuration for operating the evaluation board of the
AT84AS003 10-bit 1.5 Gsps ADC with 1:2/4 DMUX.
The analog input signal and the sampling clock signal can be accessed either in differ-
ential or single-ended fashion.
The single-ended configuration is the most straightforward but it is recommended to
work in differential mode (especially for the clock signal) for frequencies above 1 GHz.
In the case of use in differential mode, the AT84AS003 clock inputs have to be fed with
balanced signals (use a balun or Hybrid junction to convert a single signal to a differen-
tial signal).
In the case of use in single-ended mode, the inverted analog input V
INN
and clock input
CLKN should be terminated properly with 50
Ω to ground (50Ω caps can be used to ter-
minate the SMA connectors).
The RF sources can then be connected directly to the ADC's in-phase analog and clock
inputs.
3.2
Operating
Procedure
1.
Connect the power supplies and ground accesses through the dedicated banana
jacks.V
EE
= -5V, V
MINUSD
= -2.2V, V
CCA
= 3.3V, V
CCD
= 3.3V, V
PLUSD
= 2.5V, 3.3V
and -5V
V
CCD
= 3.3V and 3.3V and V
EE
= -5V and -5V have separated planes but can be
reunitedvia a short-circuit available on the top metal layer.
2.
Connect the clock input signals. In single-ended mode, terminate the inverted
phase signal (CLKN) to a 50
Ω termination to ground (50Ω cap).Use a low-phase
noise High Frequency generator.The clock input level is typically 0 dBm and
should not exceed 4 dBm (into 50
Ω).The clock frequency can range from 150
MHz up to 1.5 GHz.
3.
Connect the analog input signal. In single-ended mode, VINN should be termi-
nated by 50
Ω to ground (50Ω cap).Use a low-phase noise High Frequency
generator. The analog input full-scale is 500 mV peak-to-peak around
0V (± 250 mV). It is recommended to use the ADC with an input signal of -1
dBFS max (to avoid saturation of the ADC). The analog input frequency can
range from DC up to 1.8 GHz. At 3 GHz, the ADC attenuates the input signal by
3 dB.
4.
Connect the high-speed acquisition system probes to the output connectors.