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Zarlink Le51HE001V User Manual
Summary of Le51HE001V
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Le51he001v qlslac evaluation board, revision e user’s guide rev. A, ver. 2 october 2, 2007 document number: 080800
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Www.Zarlink.Com information relating to products and services furnished herein by zarlink semiconductor inc. Or its subsidiaries (collectively “zarlink”) is believed to be reliable. However, zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arisi...
Page 3: Table of Contents
Table of contents i document id# 080800 date: oct 2, 2007 rev: a version: 2 distribution: public document table of contents chapter 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 overview . . . . . . . ...
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Page 5: Introduction
Chapter 1 zarlink semiconductor inc. 1 introduction 1.1 overview the le51he001v evaluation board, revision e, provides a platform to fully test and evaluate the zarlink quad low voltage subscriber line audio-processing circuit (qlslac) devices. Programming and control of the qlslac device is fully s...
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Le51he001v eval board user guide 2 zarlink semiconductor inc. Figure 1–1 le51he001v evaluation board revision e silk screen.
Page 7: Jumpers and Board Op-
Chapter 3 zarlink semiconductor inc. 2 jumpers and board op- tions 2.1 device selection jumper block the 44-pin tqfp package evaluation board supports both the le58ql021 and le58ql061 qlslac devices. The pin-outs of both devices are identical when the being run in the pcm mode. Therefore, the shunt ...
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Le51he001v eval board user guide 4 zarlink semiconductor inc. That originates from the vp demo or the acif2-a board through the ifb0 connector. The jm5 jumper settings are shown in the table below. 2.4 jumpers jm6 – jm8 jumpers jm6 and jm7 connect the tscb and tsca signals respectively to pull-up re...
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Le51he001v eval board user guide 5 zarlink semiconductor inc. 2.6 test points several test points are provided to facilitate signal checking when probing around the chip. The test points and their descriptions are contained in the table below. The first 12 (/rst-pclk) are next to the ifb0 connector....
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Page 11: Board Setup and Con-
Chapter 7 zarlink semiconductor inc. 3 board setup and con- nections 3.1 overview a representative connection of a complete zarlink evaluation platform setup is shown in figure 3- 1 and figure 3-2. In both platforms, the host pc runs the software program appropriate to the type of interface board. T...
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Le51he001v eval board user guide 8 zarlink semiconductor inc. A slic device evaluation board is connected to one of the four available channels of the qlslac device. The evaluation board has four pairs of bnc connectors, vin1 - vin4 and vout1 - vout4, representing the analog inputs and outputs of th...
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Le51he001v eval board user guide 9 zarlink semiconductor inc. 3.3 power connections power for the board is supplied by three banana jacks, slac_vcc, gnd and aux_vcc. The slac_vcc powers the qlslac device only. Aux_vcc powers the on-board voltage regulator, vr1, pull-up resistors and the led. Two jum...
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Le51he001v eval board user guide 10 zarlink semiconductor inc. 3.5 device socket orientation the socket for the 44-pin tqfp qlslac device is oriented such that pin 1 of the device is towards the right-hand side of the board near the bottom (refer to figure 1–1 on page 1-2). The pin numbers “11, 12, ...
Page 15: Software Operation
Chapter 11 zarlink semiconductor inc. 4 software operation 4.1 overview two control platforms allow the user to communicate with the le51he001v evaluation board. The first platform is the vp demo board and the vp-script program or the voice path mini-pbx software. The second platform is the acif2-a ...
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Page 17: Stand-Alone Opera-
Chapter 13 zarlink semiconductor inc. 5 stand-alone opera- tional test procedures 5.1 verifying functionality of channels this test will verify functionality of all four channels of the qlslac device. While somewhat lengthy in setup, it will help the user to gain understanding of how the gx, gr, b, ...
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Le51he001v eval board user guide 14 zarlink semiconductor inc. A) click on the filter & gains: wrt/rd b1 filter coefficients button. Input zero for each dec- imal value on each channel. B) click on the write button. C) click on the filter & gains: wrt/rd b2 filter coefficients button. Input zero for...
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Le51he001v eval board user guide 15 zarlink semiconductor inc. 5.2 testing the aisn path the first path is via the aisn gain block. This test will allowing the user to see how aisn can affect a signal by simply changing the aisn gain value and writing that value to the qlslac device. Once again, you...
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Le51he001v eval board user guide 16 zarlink semiconductor inc. 5.4 testing the slic device control lines this procedure will test the control and data (inputs/outputs), cd1 and cd2, and the three slic device control lines (c3, c4, c5) of the qlslac device. To accomplish this you will need two 20- pi...
Page 21: Le51He001V Evaluation
Chapter 17 zarlink semiconductor inc. 6 le51he001v evaluation board schematic and bom 6.1 evaluation board schematic and bom the schematic for the le51he001v evaluation board, revision e and the bill of materials are attached on the following pages..
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Le51he001v eval board user guide 18 zarlink semiconductor inc..
Page 23: Glossary of Terms
Appendix 19 zarlink semiconductor inc. A glossary of terms the following is a list of terms and their definitions, as used in this manual. Acif2-a advanced computer interface board second design, revision a. This board works with the winacif software program and is used as an interface between the h...