Zarlink Le51HE001V User Manual - page 8
Le51HE001V
Eval Board User Guide
4
Zarlink Semiconductor Inc.
that originates from the VP Demo or the ACIF2-A Board through the IFB0 connector. The JM5
jumper settings are shown in the table below.
2.4
JUMPERS JM6
–
JM8
Jumpers JM6 and JM7 connect the TSCB and TSCA signals respectively to pull-up resistors.
Jumper JM8 routes the INT signal to the LED indicator.
2.5
JUMPERS JDVCC AND JAVCC
Jumpers JDVCC and JAVCC select the supply voltage source for the QLSLAC device. JDVCC
supplies the DVCC input of the QLSLAC device and JAVCC supplies the AVCC input of the
QLSLAC device. The table below, and Figure 2–2 below, illustrate the jumper positions.
Figure 2–2 Jumpers JDVCC and JAVCC
As shown in Figure 2–2 above, shorting pin 1 to 2 selects the DVCC and AVCC supplies for the
QLSLAC device to be supplied via the SLAC_VCC connection.
The jumpers permit a single, clean point for monitoring device current consumption.
Table 2–2 JM5 Jumper Settings
Position
Description
1-2
E1 signal connected to H1, H2, H3, and H4 headers for connection to a
Zarlink
SLIC Device Evaluation Board.
2-3
External MCLK clock source routed to the MCLK/E1 pin of the QLSLAC device. The
standard factory setting is pin 2-3.
Table 2–3 JDVCC and JAVCC Jumper Settings
Position
Description
1-2
Voltage is supplied via the SLAC_VCC connection (3.3 V nominal).
2-3
Voltage is supplied via the on-board regulator (VR1) (3.3 V regulated). Requires the
5V AUX_VCC to be supplied.
JDVCC
1
2
3
JAVCC
1
2
3