Aaeon SBC-551 Manual - page 59

Chapter 3  Award BIOS Setup    51

Auto Configuration

Set this item to Enabled to select predefined values for DRAM,

cache, timing, etc., according to your CPU type and system clock.

Thus, each item value may display differently depending on your

current system configuration.

System BIOS Cacheable

When enabled, access to the system BIOS ROM addressed at

F0000H-FFFFFH are cached if the cache controller is enabled.

Video BIOS Cacheable

As with caching the system BIOS above, enabling the video BIOS

cache will cause access to the video BIOS addressed at C0000H to

C7FFFH to be cached if the cache controller is also enabled.

Memory Hole At 15M-16M

In order to improve performance, certain space in memory can be

reserved for ISA cards, but must be mapped below 16 MB.

VGA Shared Memory Size

This sets the size of the 5598 model's onboard video display

memory, which is drawn from the total installed system memory.

The options range from 0.5MB to 4MB in 0.5MB intervals.  Remem-

ber, when you increase the amount of display memory you are

subtracting from the system memory.

VGA Memory Clock

You can choose different speeds for the VGA Memory Clock: from

40 up to 70MHz in 1MHz increments.

Smart Temperature Control Settings

One of the key features of the SPC-551/552 is its "Smart Tempera-

ture Control" function that automatically trigger events in the event

of CPU overheating.  The sensitivity of the triggers are determined

by the user.    The following 5 items can be customized.