Cadence CADENCE PALLADIUM XP - TECH BRIEF Manual - page 3
3
www.cadence.com
PALLADIUM XP VERIFICATION COMPUTING PLATFORM
Palladium XP offers enhancements above and beyond what traditional acceleration and emulation use
models offer. Palladium XP introduces new use models to improve verification productivity through
metric-driven verification acceleration, hardware verification language-based testbench acceleration,
Open Verification Methodology (OVM) acceleration, and system-level power verification.
UXE
Unified Xccelerator
Emulator Software
Palladium XP
Hardware XL, GXL
OVM
Open Verification
Methodology for
Acceleration
MDV
Metric-Driven
Verification for
Acceleration
PSO
Power Shutoff
Verification
STB
Synthesizable
Testbench
VBA
Vector-Based
Acceleration
TBA
Transaction-
Based
Acceleration
ABA
Assertion-Based
Acceleration
ICE
In-Circuit
Emulation
Debug
Advanced
Debug
VIP
Verification
Intellectual
Property
DPA
Dynamic Power
Analysis
SBA
Signal-Based
Acceleration
Figure 5: Palladium XP offers comprehensive use models for HW/SW
co-verification and system realization
PALLADIUM XP BENEFITS
•Highest scalability and flexibility
– Enables centralized or locally distributed verification computing with scalable resources to serve a
single user or as many as 512 simultaneous users for up to 2 billion gates capacity
– Supports flexible executable functional models at various abstraction levels (C/C++, SystemC
®
,
instruction set or cycle accurate, silicon, RTL, gates)
– Offers flexible use models and flexible resource allocation
•Unparalleled verification computing productivity
– Integrates seamlessly with the simulation environment for multi-user productivity
– Facilitates best turnaround time with efficient compile, runtime performance of up to 4MHz, and
simplified but superior at-speed and offline debug capabilities
– Reduces the learning curve with an easy-to-use flow, from simulation to acceleration to emulation, by
leveraging the existing simulation environment