Cadence ENCOUNTER CONFORMAL EQUIVALENCE CHECKER Datasheet - page 3
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ENCOUNTER CONFORMAL EQUIVALENCE CHECKER
• Structural checks—Include bus checks for
data conflicts, set-reset exclusivity checks,
and multiport latch contention checks
ENCOUNTER CONFORMAL
EQUIVALENCE CHECKER XL
In addition to all the features provided
by Encounter Conformal EC L, Encounter
Conformal EC XL offers automated
checking of complex datapaths. It also
extends equivalence checking to final
place-and-route netlist.
Datapath Synthesis Verification
Datapath optimization can create designs
that are difficult to formally verify because
of complex arithmetic operations.
Designers have been relying on simulation
to verify datapath blocks, but simulation
runtimes are exceedingly long and the
results can be incomplete.
Encounter Conformal EC XL offers a first-
of-its-kind formal solution that exhaustively
verifies complex datapath blocks without
using test vectors. It can handle a wide
variety of datapath structures required for
high-performance designs.
• Automatic flat datapath module
verification—Enables easy verification
without manually specifying boundaries
or architectures in the flattened netlist;
automatically verifies merged operators;
compares circuitry that has gone through
expression optimization and automatically
verifies multipliers with standard
architectures and dynamic structures
• Advanced pipelining check—Verifies
proper implementation of pipelined
designs
• Carry-save verification capability—Allows
verification of circuits containing carry-
save transformations introduced during
optimization for sequence of adders,
multipliers, and registers
Final Circuit Verification
Encounter Conformal EC XL is the only
verification product that enables a
complete verification solution from RTL
to final layout. It functionally compares a
SPICE netlist created for LVS or extracted
from GDS to the RTL or gate model. This
process ensures that the circuit on silicon
has the same logic function that was
designed and verified.
Smart Setup and Diagnosis
Encounter Conformal EC XL includes a set
of intelligent ‘analyze’ commands to ease
setup and diagnosis. For example, ‘analyze
setup’ investigates the current environment
and automatically remedies common setup
issues sometimes experienced by new
users. In tandem, ‘analyze nonequivalent’
can be invoked if non-equivalences are
encountered. The command then presents
a one-line answer as to what is wrong.
Figure 3: Encounter Conformal EC has an easy-to-use GUI with extensive diagnosis and debugging capabilities
RTL
design
IP
Lib
Gate
GDS
SPICE
reference
netlist
Encounter
Conformal EC
Equivalence
checking
Abstraction
Functional
model
Noise
model
IR drop
model
GDSII
Layout
model
Timing
model
Physical design
LVS
Encounter Conformal EC
Figure 4: Encounter Conformal EC XL provides complete verification from RTL to SPICE