E2v TSEV8308500 User Manual - page 12
Operating Procedures and Characteristics
3-2
TSEV8308500 Evaluation Board User Guide
0968D–BDC–01/09
e2v semiconductors SAS 2009
4.
Connect the analog signal V
IN
. The inverted phase clock input V
INB
may be left
open (as on-board 50
Ω terminated). Use a low phase noise RF source. Full
Scale range is 0.5V peak to peak around 0V, (±250 mV), or -2 dBm into 50
Ω.
Input frequency can range from DC up to 1.3 GHz. At 1.3 GHz (TBC), the ADC
attenuates by -3 dB the input signal. The board insertion loss (S21) will be fur-
nished in definitive document release.
5.
Connect the high speed data acquisition system probes to the output connector.
The connector pitch (2.54 mm) is compatible with High Speed Digital Acquisition
System probes. The digital data are on-board differentially terminated. However,
the output data can be picked up either in single-ended or differentially mode.
6.
Board functionality verification and proposed product evaluation procedure:
– A first test can be run at 500 Msps/250 MHz Nyquist: about 7.1 Effective Bits
(typ) should be obtained.
– At 500 Msps/20 MHz: about 7.2 Effective Bits (typ) should be obtained.
– At 500 Msps/500 MHz and -1 dB Full Scale analog input, 7.0 bits and -52 dBc
SFDR should be obtained.
7.
The devices operate respectively from 10 Msps up to 500 Msps in binary output
format and 10 Msps up to 500 Msps in Gray output format. It is capable of sam-
pling analog input waveforms ranging from DC up to 1.3 GHz.
3.3
Electrical
Characteristics
Notes:
1. Absolute maximum ratings are limiting values (referenced to GND = 0V), to be applied individually, while other parameters
are within specified operating conditions. Long exposure to maximum rating may affect device reliability. The use of a ther-
mal heat sink is mandatory.
2. In case only one supply is used for supplying the -5V negative power planes, apply the V
EED
absolute maximum ratings.
Table 3-1. Absolute Maximum Ratings
Parameter
Symbol
Comments
Value
Unit
Positive supply voltage
V
CC
GND to 6
V
Digital negative supply voltage
DV
EE
GND to -5.7
V
Digital positive supply voltage
V
PLUSD
GND -0.3 to 2.8
V
Negative supply voltage
V
EE
GND to -6
V
Maximum difference between negative supply voltages
DV
EE
to V
EE
0.3
V
Analog input voltages
V
IN
or V
INB
-1 to +1
V
Maximum difference between V
IN
and V
INB
V
IN
- V
INB
-2 to +2
V
Clock input voltage
V
CLK
or V
CLKB
-3 to +1.5
V
Maximum difference between V
CLK
and V
CLKB
V
CLK
- V
CLKB
-2 to +2
V
Static input voltage
V
D
GORB
-0.3 to V
CC
+0.3
V
Digital input voltage
V
D
DRRB
V
EE
-0.3 to +0.9
V
Digital output voltage
V
O
V
PLUSD
-3 to V
PLUSD
-0.5
V
Maximum junction temperature
T
j
+145
° C
Storage temperature
T
stg
-65 to +150
° C
Lead temperature (soldering 10s)
T
leads
+300
° C