E2v TSEV8388B User Manual

Summary of TSEV8388B

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    Adc 8-bit 1 gsps tsev8388b evaluation board .............................................................................................. User guide.

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    Tsev8388b - evaluation board user guide i 0973d–bdc–02/09 e2v semiconductors sas 2009 table of contents section 1 overview ............................................................................................... 1-1 1.1 description ................................................................

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    Table of contents ii tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 section 5 package description............................................................................. 5-1 5.1 ts8388bgl pinout ..................................................................

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    Tsev8388b - evaluation board user guide 1-1 0973d–bdc–02/09 e2v semiconductors sas 2009 section 1 overview 1.1 description the tsev8388b evaluation board (eb) is a prototype board which has been designed in order to facilitate the evaluation and the characterization of the ts8388b device up to its 1...

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    Overview 1-2 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 1.2 tsev8388b evaluation board figure 1-1. Tsev8388b block diagram clk clkb differential clock inputs z0 = 50 Ω z0 = 50 Ω clk clkb ts8388b vin vinb differential clock inputs gray or binary output data se...

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    Overview tsev8388b - evaluation board user guide 1-3 0973d–bdc–02/09 1.3 board mechanical characteristics the board layer’s number, thickness, and functions are given below, from top to bottom. The tsev8388b is a seven-layer pcb constituted by four copper layers and three dielectric layers. The four...

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    Overview 1-4 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 the bt/epoxy layer has been chosen because of its enhanced mechanical characteris- tics for elevated temperature operation. The typical dielectric constant is 4.5 at 1 mhz. More precisely, the bt/epoxy d...

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    Tsev8388b - evaluation board user guide 2-1 0973d–bdc–02/09 e2v semiconductors sas 2009 section 2 layout information 2.1 board the ts8388b requires proper board layout for optimum full speed operation. The following explains the board layout recommendations and demonstrates how the evaluation board ...

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    Layout information 2-2 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 2.4 power supplies the bottom metal layer 7 is dedicated to the power supply traces (v eea , v eed , v eet , v cc , v dd , v plusd ). The supply traces are approximately 6 mm wide in order to p...

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    Tsev8388b - evaluation board user guide 3-1 0973d–bdc–02/09 e2v semiconductors sas 2009 section 3 operating procedures and characteristics 3.1 introduction this section describes a typical single-ended configuration for analog inputs and clock inputs. The single-ended configuration is preferable, as...

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    Operating procedures and characteristics 3-2 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 4. Connect the analog signal v in . The inverted phase clock input v inb may be left open (as on-board 50 Ω terminated). Use a low phase noise rf source. Full scale range ...

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    Operating procedures and characteristics tsev8388b - evaluation board user guide 3-3 0973d–bdc–02/09 3.4 operating charcteristics the power supplies denoted v cc , v eea , v eed and v plusd are dedicated for the ts8388b adc. The power supplies denoted v eet , v dd are dedicated to the optional mc100...

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    Operating procedures and characteristics 3-4 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009.

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    Tsev8388b - evaluation board user guide 4-1 0973d–bdc–02/09 e2v semiconductors sas 2009 section 4 application information 4.1 introduction for this section, refer also to the product specification application notes (ts8388bgl datasheet). More particularly, refer to sections related to single-ended a...

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    Application information 4-2 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 the v plusd positive supply voltage allows the adjustment of the output common mode level from -1.2v (v plusd = 0v for ecl output compatibility) to +1.2v (v plusd = 2.4v for lvds output co...

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    Application information tsev8388b - evaluation board user guide 4-3 0973d–bdc–02/09 4.7 temperature monitoring and data ready reset function one single pad is used for both drrb input command and die junction monitoring. The pad denomination is drrb/diod. Temperature monitoring and data ready contro...

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    Application information 4-4 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 figure 4-3. Transistor vbe forward voltage versus junction temperature (i = 3 ma) 4.8 data ready output signal reset a subvis connector is provided for drrb command. The data ready signal ...

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    Application information tsev8388b - evaluation board user guide 4-5 0973d–bdc–02/09 4.9 test bench description figure 4-4. Differential analog and clock inputs configuration note: the ts81102g0 dmux device can be used at the adc output in order to slow down the adc output data rate by a factor of 4 ...

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    Application information 4-6 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009.

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    Tsev8388b - evaluation board user guide 5-1 0973d–bdc–02/09 e2v semiconductors sas 2009 section 5 package description 5.1 ts8388bgl pinout figure 5-1. Ts8388bgl pinout of cbga68 package 1 2 3 4 5 6 7 8 9 10 11 vplusd vplusd nc b3b drb gnd gnd b4 b5 nc dvee gnd gnd b2 vplusd b3 dr b4b b5b vplusd b6b ...

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    Package description 5-2 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 note: 1. The common mode level of the output buffers is 1.2v below the positive digital supply. For ecl compatibility the positive digital supply must be set at 0v (ground). For lvds compatibi...

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    Package description tsev8388b - evaluation board user guide 5-3 0973d–bdc–02/09 5.2 ts8388bf/ ts8388bfs pinout figure 5-2. Ts8388bf/ts8388bfs pinout of cqfp68 package top view ts8388bf/ts8388bfs 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 vplusd vplusd vplusd vplusd d3b d3 gnd drb dr dvee dvee dvee d4...

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    Package description 5-4 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 notes: 1. Following pin numbers 37 (clk), 40 (clkb), 54 (v in ) and 57 (v inb ) have to be connected to gnd through a 50 Ω resistor as close as possible to the package (50 Ω termination prefer...

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    Package description tsev8388b - evaluation board user guide 5-5 0973d–bdc–02/09 5.3 cbga68 thermal characteristics 5.3.1 thermal resistance from junction to ambient: rthja the following table lists the converter thermal performance parameters of the device itself, with no external heatsink added. 5....

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    Package description 5-6 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 5.4 nominal cqfp68 thermal characteristics although the power dissipation is low for this performance, the use of a heat sink is mandatory. The user will find some advice on this topics below....

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    Package description tsev8388b - evaluation board user guide 5-7 0973d–bdc–02/09 5.4.3 cbga68 board assembly with external heatsink figure 5-6. Cqfp68 board assembly with a 50 x 50 x 16 mm external heatsink 24.13 28.96 15.0 1.3 3.2 50.0 1.4 4.0 2.5 16.0 printed circuit interface: af-filled epoxy or t...

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    Package description 5-8 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 5.5 enhanced cqfp68 thermal characteristics 5.5.1 enhanced cqfp68 the cqfp68 has been modified, in order to improve the thermal characteristics: „ a cuw heatspreader has been added at the bott...

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    Package description tsev8388b - evaluation board user guide 5-9 0973d–bdc–02/09 5.6 ordering information table 5-5. Ordering information part number package temperature range screening level comments ts8388bvf cqfp 68 “v” grade: – 40 °c standard ts8388bmf cqfp 68 “m” grade: – 55 °c standard ts8388bm...

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    Package description 5-10 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009.

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    Tsev8388b - evaluation board user guide 6-1 0973d–bdc–02/09 e2v semiconductors sas 2009 section 6 schematics 6.1 tsev8388b electrical schematics please refer to figure 6.1 below..

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    Schematics 6-2 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 figure 6-1. Tsev8388b electrical schematic.

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    Schematics tsev8388b - evaluation board user guide 6-3 0973d–bdc–02/09 figure 6-2. Board digital outputs default option figure 6-3. Board digital outputs option using mc100el16 differential receivers vdd = -2v in inb out outb to output connector z0 = 50 z0 = 50 50 50 digital data 50 Ω differential t...

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    Schematics 6-4 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 6.2 evaluation board schematics 6.2.1 cbga68 option figure 6-4. Component side description figure 6-5. Ground plane.

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    Schematics tsev8388b - evaluation board user guide 6-5 0973d–bdc–02/09 figure 6-6. Power supplies planes figure 6-7. Tsev8388b evaluation board: component placement.

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    Schematics 6-6 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009 6.2.2 cqfp68 option figure 6-8. Component side description figure 6-9. Ground plane.

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    Schematics tsev8388b - evaluation board user guide 6-7 0973d–bdc–02/09 figure 6-10. Power supplies planes figure 6-11. Tsev8388b evaluation board: component placement.

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    Schematics 6-8 tsev8388b - evaluation board user guide 0973d–bdc–02/09 e2v semiconductors sas 2009.

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    0973d–bdc–02/09 e2v semiconductors sas 2009 whilst e2v has taken care to ensure the accuracy of the information contained herein it accepts no responsibility for the consequences of any use thereof and also reserves the right to change the specification of goods without notice. E2v accepts no liabil...