E2v TSEV8388B User Manual - page 10
Layout Information
2-2
TSEV8388B - Evaluation Board User Guide
0973D–BDC–02/09
e2v semiconductors SAS 2009
2.4
Power Supplies
The bottom metal layer 7 is dedicated to the power supply traces (V
EEA
, V
EED
, V
EET
, V
CC
,
V
DD
, V
PLUSD
).
The supply traces are approximately 6 mm wide in order to present low impedance, and
are surrounded by a ground plane connected to the two inner ground planes.
The Analog and Digital negative power supply traces are independent, but the possibil-
ity exists to short-circuit both supplies on the top metal layer.
No difference in ADC high speed performance is observed when connecting both nega-
tive supply planes together. Obviously one single negative supply plane could be used
for the circuit.
Each power supply incoming is bypassed by a 1 µF Tantalum capacitor in parallel with
1 nF chip capacitor.
Each power supply access is decoupled very close to the device by a 10 nF and 100 pF
surface mount chip capacitors in parallel.
Note:
The decoupling capacitors are superposed. In this configuration, the 100 pF capacitors
must be mounted first.
2.5
TS8388B On-
board
Implementation
Surface-mount resistors and chip capacitors allow the closest possible connections to
the device pins, for microstrip line back termination and bypassing.
Connecting the positive supply pads:
– The positive supply pads denoted V
CC
:
The corresponding V
CC
pad numbers are 19, 21, 23, 30, 39, 40.
Each V
CC
power supply pad is decoupled as closely to the device as possible
by a 1 nF chip capacitor.
The V
CC
supply pads are connected to the back side V
CC
plane of the CEB.
– The positive digital supply pads are denoted V
PLUSD
(0V or 2.4V).
The corresponding V
PLUSD
pad numbers are 1, 11.
Each V
PLUSD
power supply pad is decoupled very close to the device by a 1 nF
chip capacitor.
The V
PLUSD
supply pads are connected to the back side V
PLUSD
plane of the
evaluation board.
Connecting the negative supply pads:
– The TS8388BGL has separate analog and digital –5V supplies:
The negative analog supply pads are denoted V
EE
.
The V
EE
corresponding pad numbers are 22, 29, 31.
The negative digital supply pad is denoted DV
EE
.
The DV
EE
corresponding pad number is pad 6.
The DV
EE
supply pad is dedicated to the digital output buffers only.
Each V
EE
and DV
EE
power supply pad is decoupled as closely as possible
near the device by a 1 nF chip capacitor.
– The V
EE
and DV
EE
supply pads are respectively connected to the backside
layer 7 V
EE
and V
EED
supply planes.
Ground pads connections:
– The analog ground pads are denoted GND.
The corresponding GND pad numbers are 20, 26, 28, 33, 35, 37.