Revision 1.5 http://lavryengineering.Com (206) 842-3552 bainbridge island, wa 98110 945 hildebrand lane ne suite 110 lavry engineering, inc. Operations manual high resolution digital to analog converter model da2002 engineering lavry.
2 da2002 operations manual.
3 www.Lavryengineering.Com internet: info@lavryengineering.Com crystallock™ is a trademark of lavry engineering, inc. Acoustic bit correction® and lavry engineering® are registered trademarks of lavry engineering, inc. Copyright ©2002 by lavry engineering, inc. All rights reserved. Incidental damage...
4 specifications............................................................................................11 part iii maintenance..............................................................................................10 power and fusing...........................................................
5 • supports new hi-density i/o standards from sonic solutions • professional and consumer inputs and outputs • crystallock™ digital jitter removal • increased low level accuracy • automatic calibration • very low total harmonic distortion + noise • multi-bit architecture with 24 bits, non sigma-del...
6 spdif (consumer format) input to iec input . Aes/ebu input to the xlr connector designated as aes input 2 aes/ebu input to the xlr connector designated as aes input 1 the unit can be connected to one, two or three digital input connectors located on the rear panel: input signal connection the inpu...
7 load, 2v r.M.S. Into 600ohms. For un-balanced xlr connection: the analog output level for a full-scale signal is 2.2v r.M.S. Into 100kohm load, 4.2v r.M.S. Into 600ohms. For balanced xlr connection: the analog output level for a full-scale signal is 4.5v r.M.S. Into 100kohm the analog output level...
8 note: changing between crystall lock and normal lock requires a signal to be present at the unit input. By blinking the appropriate status light periodically. This mode setting is retained when power is removed. Crystallock™ , press and hold the polarity button again. The unit indicates wider lock...
9 effective adjustment of a part in 5 million per calibration dac step. Resistor, thus a full 10v swing on the calibration dac can only pull a given node by +/-4mv, providing an bit device to ensure monotonic performance. Each dac is fed to its corresponding node through a large value measured node....
10 the jitter content is random, much is due to coupling of the data itself into the receiver circuitry. Rejection of low frequency jitter content (typically hundreds of hz of zero rejection bandwidth). While some of signal. The need to keep enough bandwidth for locking to and tracking the incoming ...
11 fingerprints. The front panel is gold plated (24 karat gold). Use a soft cloth (and plain water, if necessary) to clean a long-term reliability standpoint. Maximum). The temperature rise is no cause for concern, but allowing for some airflow is always a benefit from linear power supplies and disc...
12 input voltage 115v 60hz or 220v 50hz, 20 watts warm-up and initial calibration 10 minutes maximum, 3 minutes typical consumer outputs 2v r.M.S. Into 100k ohms aes/ebu unbalanced 2.2v r.M.S into 100kohms aes/ebu unbalanced 2v r.M.S into 600 ohms aes/ebu balanced 4.5v r.M.S. Into 100kohms analog ou...
