Leadtek WinFast 6300MAX/MA Pro User Manual - page 18
Leadtek Research Inc.
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LD-Off RD/WR Cycles [Delay 1T]
When set to “Delay 1T”, memory read/write command is issued 1 clock behind memory
address (MA). When set to “Normal”, both of them are issued at the same time.
Write Recovery Time [2T]
The period of Date-in to pre-command.
VCM REF To ACT/REF Delay [10T]
The period of VCM REF to REF/ACT command.
VCM ACT - ACT/REF Delay [9T]
The period of VCM ACT to ACT/REF command.
Early CKE Delay 1T Cntrl [Normal]
When enabled, CKE is driven out from flip-flop. It is used when system operates under low
frequency and CKE delay adjustment method defined in Bits[3:1] can not meet setup time
and hold time requirement.
Early CKE Delay Adjust [2ns]
To control the timing for CKE. Various delay options are provided to ensure that CKE can
meet SDRAM setup time and hold time specification when CKE is driven out.
Advanced RAM MODULE Ctl [Press Enter]
In some special cases of the DRAM module, the DRAM timing should set to the best values
for your system by your own. We suggest fine tuning by
±
1ns each time. For example:
TheDRAM "Mitac 0112RU25641" timing values are 2.5ns, 2ns, 2ns, and 1ns.
Mem Command Output Time [Delay 1T]
This bit is used to control the timing to drive memory command onto memory bus. When
heavy loading memory is used, signal propagation delay may be more than 1 clock. In this
case, enabling this bit will force all memory command delay 1 clock except self refresh
command and the reference clocks are adjustable clocks defined in regular 8Ch and 8Dh.
SDRAM/VCM CAS Latency [3T]
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on
the DRAM timing. Do not reset this field from the default value specified by the system designer.
System BIOS Cacheable [Enabled]
Select Enabled to allow caching the system BIOS ROM at F0000h-FFFFFh to enhance the
performance. The system error may occur if any program writes to this memory area.
Video RAM Cacheable [Enabled]
Select Enabled to allow caching the video memory (RAM) at A0000h-AFFFFh to enhance
the performance. The memory access error may occur if any program writes to this area.
Memory Hole at 15M-16M [Disabled]
This item can be used to reserve memory space for some ISA expansion cards that require it.
AGP Aperture Size [64MB]
Select the size of the Accelerated Graphics Port (AGP) aperture. The aperture is a portion of
the PCI memory address range dedicated for graphics memory address space. Go to www.
agpforum.org for more information on AGP.
Graphic Window WR Combin [Enabled]
Select this item to enable or disable CPU support for WR Combin feature.
Concurrent function (MEM / PCI) [Enabled / Enabled]
Enable or Disable Memory/PCI bus utilization optimized.
CPU Pipeline Control [Enabled]
This item is set a timing parameter for CPU access.
PCI Delay Transaction [Enabled]
If the chipset of your mainboard has an embedded 32-bit write buffer to support delay