TallyGenicom 6306 Maintenance Manual - page 17
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Quick Start Manual, Specifications, Operator's Manual, Operator's Manual, Installation Instructions Manual, Brochure, Specifications
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Chapter 1. Technical Overview
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1.4.6 Main Processor
1.4.6.1 Freescale ColdFire 5307
66 Mhz clock – using a spread-spectrum clock generator
32-bit CPU bus
Two DMA channels- one for hammer loading, and one for the IEEE-1284 parallel
interface
Two serial channels – one for communication with the Control Processor and one for the
external serial interface
Internal single data rate SDRAM controller
1.4.6.2 Xilinx XC95144
Logic for IEEE-1284 Parallel interface
Logic for PSIO interface
The following table shows host interface configuration options:
Personality Module
Standard Ser/Par
LANPlex
FourPlex
Host I/Os
IEEE 1284
RS-232-C
IEEE 1284
RS-232-C
Ethernet
IEEE 1284
RS-232-C
Twinax
Coax
Optional Configurations
IPDS
IPDS