D-Link xStack DGS-3600 Series User Manual - page 278
xStack DGS-3600 Series Layer 3 Gigabit Ethernet Managed Switch
Offset
This field will instruct the Switch to mask the packet header beginning with the offset value
specified:
The CPU Access Rule may be configured on a per-port basis by entering the port number of the
Switch.
Click the check box and enter the name of the Time Range settings that has been previously
configured in the
Time Range Settings
window. This will set specific times when this CPU
access rule will be implemented on the Switch.
•
•
•
•
value (48-63) - Enter a value in hex form to mask the packet from byte 48 to byte
63.
•
value (0-15) - Enter a value in hex form to mask the packet from the beginning of
the packet to the 15th byte.
value (16-31) - Enter a value in hex form to mask the packet from byte 16 to byte
31.
value (32-47) - Enter a value in hex form to mask the packet from byte 32 to byte
47.
value (64-79)
- Enter a value in hex form to mask the packet from byte 64 to byte
79.
Port
Time Range
To view the settings of a previously correctly configured rule, click
in the
Access Rule Table
to view the following window:
Figure 10- 3 . CPU Interface Filtering Entry Display window (Packet Content)
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